Two PhD position at VERIMAG in collaboration with ST microelectronics



Two PhD position at VERIMAG in collaboration with ST microelectronics
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Background

To cope with the complexity of applications and time-to-market
constraints, the semi-conductor industry is moving to a reconfigurable
multi-processor architecture, in which tasks which were previously
hardwired in the circuit or associated with dedicated processing units
are now executed by several interconnected processors. Although the
use of software allows more flexibility it poses new challenges,
mainly in identifying the parallelism in the application and deploying
the software on the multi-processor architecture in order to obtain
good performance with low energy consumption.

The xStream architecture developed by ST is such a multi-processor
architecture specialized for stream-processing applications (video,
audio, radio). It consists of a large number (10-60) processing units
with a configurable communication topology. The speed and voltage of
each processor can also be tuned. The main challenge in software
development for such an architecture is how to deploy parallel
programs which are written in an architecture-neutral way into a given
instance of the architecture while preserving the semantics of the
program, meeting timing constraints and saving energy.

The proposed PhD positions will be co-supervised by VERIMAG and ST in
the framework of the Minalogic-Athole project. The salary is around
1700 Euro per month for 3 years.

Contact: Oded.Maler@xxxxxxx or bruno.jego@xxxxxx

Position 1: Scheduling Stream-Processing Applications on a Multi-
Processor

The proposed thesis will develop techniques for deploying and
scheduling parallel programs on the xStream architecutre. This
work will include:

1) Study and formalization of stream-processing data-flow programs,
including execution times as well as timing and energy requirements

2) Study and formalization of the xStream architecture and defining an
architecture description language

3) Development of efficient scheduling algorithms for mapping programs
to architecture

4) Implementation and experimentation

Requirements: background in computer architecture, programming,
semantics, compilation, algorithms and some formal thinking

*********************

Position 2: Programming Languages for Stream Processing Applications


The proposed thesis will study the appropriate programming language
constructs for writing stream-processing applications in a manner
which is natural for the application and can express the inherent
parallelism, but supports efficient compilation to the xStream
architecture. The work will be inspired by the experience accumulated
in Verimag in the development of the data-flow language Lustre and on
the language C-stream developed at ST.

The work will include:

1) Study of the typical stream-processing application and their
programming requirements

2) Comparative study of various data flow language (Lustre, StreamIt,
SDF)

3) Development of language constructs, including special annotations
for required performance.

4) Development of compilation methods that interface with the
scheduling algorithms.

5) Implementation and experimentation

Requirements: background in computer architecture, programming,
semantics, compilation and some formal thinking

Contact: Oded.Maler@xxxxxxx or bruno.jego@xxxxxx

.



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