Re: Pulling crystal
- From: "W3JDR" <joe@xxxxxxxxxx>
- Date: Sat, 05 Nov 2005 21:03:45 GMT
Chris,
You didn't say what you're using for th active element...you only gave pin
numbers. Can you elaborate?
Joe
W3JDR
"Apparatus" <apparatus.home@xxxxxxxxx> wrote in message
news:1131196562.702038.225900@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
> Hi,
>
> I am working on building a VCO for FSK with 850 Hz separation between
> mark and space. I am building it using a 16.000 MHz 32pf parallel load
> crystal. I am pulling the crystal via a varactor to implement the FSK.
> However, the amplitude between mark and space is an unacceptable 10 dB
> with about 700 Hz of shift. Any ideas on how to pull the crystal
> without changing the amplitude of the mark and space frequencies
> considerably?
>
> A bit about my circuit: have an 8 - 50 pF tuning cap across pins 6 and
> 7; a 22pF cap shunts pin 7. The crystal shunts pin 6. A 100nF DC block
> cap separates pin 6 from the 8 - 29 pF (3 to 10 V reverse bias)
> varactor. A 1mH inductor isolates AC from the varactor biasing.
>
> I tried adding 1uH of inductance in series with the crystal. This moved
> the oscillation frequency up, but the amplitude problem remained. I
> tried putting the varactor across the tuning cap. This configuration
> exhibited the same amplitude shift problem, but shifted the frequency
> up rather than down. I tried combining the two shifts via two varactors
> and a JFET to invert the biases, one across the crystal (as originally)
> and one across the tuning cap. This didn't work well (very noisy
> spectrum).
>
> Any ideas as to what could be the problem and how to fix it?
>
> Cheers,
> Chris
>
.
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- Pulling crystal
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