Re: universelle programmierbare Heizungssteuerung gesucht



Klaus Rotter schrieb:
Falk Willberg schrieb:
Schick! Da steht aber 4*10Bit A/D. Ist ja das Gleiche wie wie 2*20 ;-)

Das sind die Audio Wandler: Philips UCB 1400

Datenblätter sind etwas mager.

Hast du das gesehen: http://www.keith-koep.com/produkte/baseboard/uConXS_ver1_1.pdf

Wäre nett zu wissen, ob man evtl ein PSP Display anschließen könnte...


Das Baseboard ist ja dabei ;-)
der PXA270 steuert normalerweise TFT die Umsetung aud VGA macht ein ADV7120 auf dem Baseboard. Die Stecker für TFT sind nicht eingelötet können aber einfach nachbestückt werden (Unterseite).

Auszug aus dem PXA Manual:

The LCD controller supports these key features:
• Display modes
— Support for single- or dual-scan display modules
— Passive monochrome mode supports up to 256 gray-scale levels (8 bits)
— Active color mode supports up to 16777216 colors (24 bits)
— Passive color mode supports a total of 16777216 colors (24 bits)
— Support for LCD panels with an internal frame buffer
— Support for 8-bit (each) passive dual-scan color displays
— Support for up to 18-bit per pixel single-scan color displays without an internal frame
buffer
— Support for up to 24-bit per pixel single-scan color displays with an internal frame buffer
• Base plane with software control of two overlay windows and a hardware cursor
• Color management:
— Up-scaling for YCbCr 4:2:0 and 4:2:2 to YCbCr 4:4:4
— Color space conversion CCIR 601—YCbCr 4:4:4 to RGB 8:8:8
— Conversion from true color, (RGB 8:8:8) to high color (RGB 5:5:5) and the various
configurations of RGBT
• Support for display sizes from 1x1 to 800 x 600 pixels.
• 64-entry (by 24 bits) output FIFO
• Three 256-entry by 25-bits internal color-palette RAMs (one for each overlay and base)
programmable to be automatically loaded at the beginning of each frame
• Command data RAM (16 x 9 bits) to hold command data
• Supports pixel depths of 2, 4, 8, 16, 18, and 24 bits per pixel (bpp) in RGB format
• Overlays supported with pixel depths of 16, 19, 24, and 25 bpp in RGBT format
• Provides one base layer plus two overlays for single-scan displays; maximum size of each
overlay can equal the display size
• Integrated seven-channel DMA (one channel for base plane, one channel for Overlay 1 and
three channels for Overlay 2, one channel for the hardware cursor, and one channel to for the
command data)
• Hardware support for color-space conversion from YCbCr to RGB for video streams
• Supports hardware cursor for single-scan display
• Programmable toggle of AC bias-pin output (toggled by line count)
• Programmable pixel clock from 52.0 MHz to 25.4 kHz (104.0 MHz/2 to 13 MHz/512)
• Supports little-endian ordering of pixels in frame buffer
• Programmable wait-state insertion at beginning and end of each line
• Programmable polarity for output enable, frame clock, and line clock
• Programmable interrupts for input and output FIFOs (underrun)
• Six 16 x 64-bit input FIFOs: one for the base channel, one for Overlay 1, three for Overlay 2,
and one for the hardware cursor; plus a seventh 4 x 52-bit input FIFO for command data for
panels with internal frame buffer
• Backward-compatible with the Intel® PXA25x and Intel® PXA26x processor LCD controllers

Gruß Hans-Georg
.



Relevant Pages