Re: Restoring a NorthStar Horizon, problems with SRAM board

On May 16, 10:32 am, chiaroscuro <nob...@xxxxxxxxxxx> wrote:
On 14 May 2007 19:10:41 -0700, lync...@xxxxxxxxx wrote:



The Horizon contains a NorthStar ZPB-A3 CPU board, a Tanner (DRC) 64K
Static RAM board, a NorthStar MDS-AD3 floppy controller, a Hayes
MicroModem 100, and a Vector Graphics Flashwriter (clearly not a II so
its probably a I) video board.

The motherboard is wired to support a serial printer on the right
serial port, the left serial port is disabled, the parallel output
port does not appear to be configured, the parallel input port is
attached to a custom keyboard.

Wow, a message on this group!

I'd remove everything but the CPU, disk controller and memory. The
memory needs to be addressed so there's a hole for the boot prom at
(probably) E800. Then I'd make sure the left serial port is configured
to run a terminal at 9600 baud, and hook a PC to the port running a
terminal program (telnet). The motherboard manual tells how to set up
the ports via the wired headers. The N* Ram manuals tell more about
the memory addressing. Almost all the manuals are avilable on the web.
See:http://vt100.net/mirror/harte/Northstar/


Hi Jim, Thanks for the reply!

I am following the CPU board check out procedures in the manual as I
would like to establish that it is working before any more integration
testing. I am starting to suspect my CPU board is not working right.



The ZPB-A3 CPU board contains the 2708 PROM boot option which makes
sense since this computer has been highly modified and does not rely
on a serial terminal.

Does the PROM have a label? There was a N* option called HDT which was
a debugger. Once you have the serial port working you should be able
to talk to this PROM. It's been too many years, but I still remember a
few of the commands - they start with a semicolon - ;M ran a simple
memory test, 1;D turned on drive #1, ;J (address) jumped there.


No the EPROM didn't even have a UV window cover which I found rather
odd. It is just a naked EPROM with mysterious contents. The CPU
board is configured to store the ROM at $F800 and that is all I know.

I will keep your idea in mind in case I ever get the contents of the
2708 EPROM read. I am probably going to replace it with an adapter.

The boot ROM is on the disk controller, and there's another wired
header somewhere to control the power-on-jump-address.


I found it and the CPU is configured to auto-jump to $E800 which is
where the disk controller PROM resides. That makes sense to me.

My memory is a bit foggy, since I last worked on this stuff in the
early '80's.

jim

I am continuing the debug process from last night. I verified the 2
MHz CLOCK signal is still almost zero volts on the NorthStar
motherboard which is quite odd. I should be reading a higher average
voltage than 0 but will have to double check what is going on with it.

I went on to the CPU board check out procedures step C3 since the
RESET logic seems to be working. However, I have definitely found
some odd behavior in the Auto-Jump logic. I installed the jumper on
chip 7F pin 5 and 7 and reinstalled the CPU board in the test S-100
chassis. Then I powered up and pressed reset button. That should
have fired off the Auto-Jump sequence and it is supposed to put SM1 to
a HIGH state on motherboard pin 44. However, when I measured it, I
was getting a LOW 0.20 v which definitely conflicts with the
procedure. Clearly something isn't right here. So I read more about
the Auto-Jump theory and it seems to revolve around a 74LS175 at 4G.
So I inspect that chip with my VOM and look at the voltages I get:

pin
5, 16, 10 = 5V (Vcc)
4, 12, 7, 2, 1 = 4.20 (HIGH)
6, 3 = 0.20 (LOW)

this all makes sense right? Check out pin 9 -> 2.44v. That seems
strange so I look at what pin 9 does. It is the /MX-EN (I presume
meaning multiplexer enable, active low). I trace that signal back to
its origin at a 74LS03 at 6E and the /MX-EN signal is two open
collector NAND gates wire-OR'd together. Strange stuff.

I thought maybe the 2.44v signal was caused by oscillating reading on
its output of the 74LS03's pins 6 and 8 wired together. Nope. I
check the inputs to the NAND gates and the first one's inputs are pins
9 = .24v LOW and 10 = 4.85v HIGH. So I check the output of the second
NAND gate and its inputs are pins 5 = 4.40v and 4 = 0.13v. Both NAND
gates have similar, steady inputs which should be generating solid
HIGH outputs. Where did this weird 2.44v come from?

So I power off and pull the 74LS03 chip out of its socket to inspect
it. It seems normal so I pull out pin 8 and reinsert it to see what
its value is alone in the circuit. Power up, press reset and recheck
the inputs voltages... all the same as they were. Check the output of
pin 6 = 5.0v now that is a solid HIGH value. That seems OK. I check
pin 8 and it is reading 0.72v but it is an unconnected open collector
output so that doesn't mean much.

I switch it around so that the 74LS03 pin 8 is reinserted and the pin
6 is outside and here are the readings:

output pin 8 = 2.45v
input pin 9 = 0.20v
input pin 10 = 4.85v

output pin 6 = .94v (unconnected open collector, I don't think this
means much)
input pin 5 = 4.18v
input pin 4 = 1.41v (this is strange)

I reconnect pins 6 and 8 back to the way it was and all the voltages
return to their previous values.

I am thinking there is definitely something funny going on with that
74LS03 -- especially with the 8,9,10 NAND gate. If it were connected
in circuit by itself and had nearly the exact same inputs, wouldn't
its open collector output be driven up to the Vcc and pull up resistor
value (5v) like the other NAND gate did? It seems more than a
coincidence that the output value it did come to is the same value
that I get when both NAND gates are wire-OR'd together.

If anyone has a few minutes and a working NorthStar Horizon with a ZPB-
A2 CPU board, would you mind taking a few readings on what the 74LS03
at 6E is really supposed to be? Technically, 2.45v is a barely legal
input to another gate but I do not think it is legal as an output
value for TTL. I would think the wired OR's would go to near Vcc or
LOW rather than some weird middle value like 2.45v.

After all this is said and done, my SM1 value does not go high and it
is supposed to be since the auto-jump logic basically forces the Z80
to jump to the start up address if its working. I suspect that is
never happening because I never get any response to a reset or
anything else which should force the auto-jump logic to do make the
CPU do something. The Z80 appears like it is in semi-permanent wait
state and the auto-jump is never being executed.

Anyone have any insights here? Thanks!

Andrew Lynch


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