Re: Athlon question revisited

David Kanter wrote: 
Bill Davidsen wrote:

Let's keep asking, has anyone run similar Athlon X2 chips with 512k and
1M cache on a similar integer workload, and if so was there any
measurable difference?

I'm looking at the 4{2,4,6}00+ chips trying to guess if the larger cache
will reduce memory contention. If I read the description correctly all
of the memory is on one core, so it should make a difference.



That's not right.  The K8 dual core chips all have private caches, but
share the memory controller, I/O and router.  Much smarter than a
shared package chip, but not as good as sharing your last level of
cache, like the POWER4/5, SPARC-IV+, Fujitsu SPARC64-V/VI and Intel's
next gen systems.

More than share the memory controller, does't the memory controller hang off one core and the other use a NUMA-like connection to access the RAM? But essentially the core are still competing for the same bandwidth to memory, however it's laid out.

I'm trying to determine if 1MB cache at 9% slower clock is more or less than a faster chip with 512k cache. Thought someone might have a benchmark.

--
bill davidsen (davidsen@xxxxxxxxxxxxxxxxxxxx)
  SBC/Prodigy Yorktown Heights NY data center
  Project Leader, USENET news
  http://newsgroups.news.prodigy.com
.

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