Re: Monthly FAQ for current activity on this N.G. ?
- From: Louis Ohland <ohland@xxxxxxxxxxx>
- Date: Mon, 31 Mar 2008 18:59:04 -0500
Alvin, let's take a big hit of blue monster...
What if there were more than one XGA setting up video in system memory, and the master XGA would cycle through each one to display it?
True, the negotiation doesn't help, but don't let reality get in the way...
But... since we are such slow beings compared to the computer, how long do we have in fractions of a second, before the delay caused by bus arbitration affects our perception of a contiguous image?
Hmm, set five XGA up, one is the master. Four are processing memory chunks.
Alvin Andries wrote:
"Louis Ohland" <ohland@xxxxxxxxxxx> wrote in message.
news:NV6Ij.24$fY2.12@xxxxxxxxxxxxxxx
William, one interest is to figure out Multiple XGA. But... just as
What's the problem? XGA memory location not programmable? Enlighten me (us).
interesting are the quiet hints that the XGA can access system memory as
a busmaster. There would be a performance hit, FPM vs. VRAM, yet 4MB of
FPM vs. 1MB of VRAM seems like an interesting trade.
Unless your video would get priority -1 on the MCA bus, you're stuck with a
non-real time system. Forget decent video in such framework. The first
requirement in a video controller is to make sure data will be availaible
when the timing engine requires it.
Regards,
Alvin.
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