Re: How AMD will take on Intel Woodcrest: twice the FPU's

On 24 Feb 2006 16:52:32 -0800, "David Kanter" <dkanter@xxxxxxxxx> wrote:

AMD has a response to Intel Woodcrest server chips
"The first of these that we have heard about is the server variant, and
it will be a killer. It has 2x the floating point units, and sources
tell us that it will push about 1.5x the floating point performance of
the current chips in the real world."
http://www.theinquirer.net/?article=29890

I assume that means 2xSSE3 units. I'm not sure how that really improves
the traditional server market - e.g. file serving, database/TP etc. doesn't
do floating point per se and I've not heard of SSEx being a big play
there... though that could just be my ignorance showing.:-)

AMD AFAIK doesn't have SSEn units for any n. They just decode SSE ops
into scalar instructions and execute them on the traditional FPUs.

Hmm, "traditional" is a little misplaced don't you think? How things work
internally is not the important thing here but whether the SSEn, in
particular 2xFP, is a benefit in servers. OTOH, since it's the umm
Inquirer, it could also be that 2xFPs means that AMD will expand its
internal SSE FP ops out to a full effective 128bits.

--
Rgds, George Macdonald
.

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