Re: Bus related timing issue (was Re: C64 Building Block Computer (was: IEEE 488 bus))
- From: Richard James <rjames@xxxxxxxxxxx>
- Date: 05 Feb 2008 01:20:37 GMT
On Mon, 04 Feb 2008 11:20:50 -0800, christianlott1 wrote:
If I had two devices accessing the same memory on the same bus, one at
1mhz, the other at 16mhz where the memory speed is 400mhz - I would need
some kind of converter chip on each device if there was such a thing?
What is that thing called?
I was talking to someone who said it'd just be a filter, like a hi/lo/
notch type. I searched for "Frequency Conversion Filter" but can't find
anything.
My assumption is that this is not possible. The data needs to be sent
serially.
Yet if the bus is run at 400mhz can there be a converter chip that
propagates the 1mhz to 400mhz sampling frequency?
I'm sure it's not that simple and there needs to be some conversion to
direct data where rising edge is sensed at 1mhz and converted to one
400mhz pulse for the main bus controller chip to decode and deal with
through the programmable mmu.
Ideas?
You need to look at the specifications of the particular chips and see if
their timings meet. An example of this can be found in the following PDF
http://www.rabbit.com/documentation/docs/RabbitStoreHolding/650-0029.pdf
That is a RAM chip, look on page 5 and see the funny looking diagrams.
Those denote the not only what lines are active but also the timings
between when they are active and when say the data line is active.
Basically RAM access works like this (for reading)
CPU sends read signal
CPU sends address
RAM chip receives read signal and address
RAM chip outputs data
CPU receives data
CPU stops sending read signal
CPU stops sending address
RAM chip stops sending data
For the RAM and CPU to communicate they have to be able to read the
signals with the right timing.
The major problem I can see with Connecting a 1MHz device to 400MHz RAM
is that the RAM may stop sending the data before the 1MHz device has had
the time to read it. Again the only way you know is to look at the timing
sheets.
If the timing is a problem you would need to use a buffer that delays the
signal. Unfortunately I don't know of any such buffers. I did however
find the following page on google which might help
http://www.maxim-ic.com/appnotes.cfm/an_pk/57
Richard James
.
- References:
- Bus related timing issue (was Re: C64 Building Block Computer (was: IEEE 488 bus))
- From: christianlott1
- Bus related timing issue (was Re: C64 Building Block Computer (was: IEEE 488 bus))
- Prev by Date: Is Maurice Randall dead? In prison?
- Next by Date: Re: Designer of the Commodore Datassette?
- Previous by thread: Bus related timing issue (was Re: C64 Building Block Computer (was: IEEE 488 bus))
- Next by thread: Re: Bus related timing issue (was Re: C64 Building Block Computer (was: IEEE 488 bus))
- Index(es):