Re: SPI on the User Port ... Mode Hang-Ups.
- From: BruceMcF <agila61@xxxxxxxxxxxx>
- Date: Tue, 29 Jan 2008 14:32:21 -0800 (PST)
On Jan 29, 4:27 pm, Mark McDougall <msmcd...@xxxxxxxxxxxxx> wrote:
BruceMcF wrote:
If it was me,
and given that some form of CPLD (maybe a PEEL18CV8) is required
anyway,
If it was me, and given that some form of CPLD is required anyway, I'd
forget about stuffing around with SPI on the IEC port altogether because SPI
is so trivial it can be implemented in a few lines of VHDL inside the CPLD,
which would then be better hanging off the cart port with port/memory-mapped
registers running at whatever speed the C64 can suck/blow to the SPI
controller...
Yeah, see downthread a bit.
But I don't reckon I'd ever got that much on top of the hardware to do
it, which is why its labeled Notional ... and it goes without saying
that for either a serial UART or a PS1 controller, the User Port can
go as fast as the hardware can ... its internal or MMC Flash RAM where
a cartridge port SPI using DMA 8 bytes at a time would be a tremendous
improvement.
.
- References:
- SPI on the User Port ... Mode Hang-Ups.
- From: BruceMcF
- Re: SPI on the User Port ... Mode Hang-Ups.
- From: Mark McDougall
- SPI on the User Port ... Mode Hang-Ups.
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