Re: SPI on the User Port ... Mode Hang-Ups.
- From: Mark McDougall <msmcdoug@xxxxxxxxxxxxx>
- Date: Wed, 30 Jan 2008 08:27:15 +1100
BruceMcF wrote:
If it was me,
and given that some form of CPLD (maybe a PEEL18CV8) is required
anyway,
If it was me, and given that some form of CPLD is required anyway, I'd forget about stuffing around with SPI on the IEC port altogether because SPI is so trivial it can be implemented in a few lines of VHDL inside the CPLD, which would then be better hanging off the cart port with port/memory-mapped registers running at whatever speed the C64 can suck/blow to the SPI controller...
Regards,
--
| Mark McDougall | "Electrical Engineers do it
| <http://members.iinet.net.au/~msmcdoug> | with less resistance!"
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