Re: SPI on the User Port ... Mode Hang-Ups.

BruceMcF wrote:
The data*** says: "Data shifted out becomes valid on the falling
edge of CNT and remains valid until the next falling edge." So its the
trailing phase of the clock that data is available *through* a clock
transition. For Mode 0, it has to be the leading phase of the clock
that has data available *through* a clock transition.

OK, I misread, but there should still be a way to easily switch it to Mode0.

I don't like the idea of so many SEL lines, as in your original idea. That's wasteful of the limited IO on the user port. If there is no way to switch to Mode0, I vote you hang a small SPI uC of some type off the user port and be done. An AVR or PIC takes no more to program than a PEEL or PAL/GAL and can provide a lot more value at the same cost.

Fewer parts is better ... if I can get by with Mode3 alone, I'll be
grinning.
I vote for uC, one IC to mess with. The advantage of that is the ability to handle some higher level protocols (FAT for SD cards, etc.) and you get a real USART to boot.

You can do an ATAPI-style interface with just the IO on the user port. PORTB is data, PA2 is CMD/DATA, /IRQ could be /FLAG2, and /PC would signal good data on PORTB. With a little thought, you could arrange it so normal RS232 operation would not impact this communication.

Jim

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