Re: C64 Building Block Computer (was: IEEE 488 bus)


The quest continues!


On Jan 16, 12:57 pm, Jim Brain <br...@xxxxxxxxxx> wrote:
christianlott1 wrote:
Of course you'll need to be able to configure it from a running
system. Configuring this profile can be done from whatever system is
set up to program it. I think jumpers are out of the question at most
levels ;)

Note that softswitches drive costs up.

eek. I don't know what a 'softswitch' is. I was imagining some central
super-PLA, FPGA, whatever, that routes all the lines.

I had posted some simplistic diagram in 2005 that's no longer up, but
here's the blurb from the post:


"The Memory Management Unit [would] allow [] the full combinatoric and
parallel paths necessary to link processors and chips in arbitrary
configurations, each with it's own bus path if desired. Therefore we
could have a 6809 talking to a VIC2 running s-video out (to the left)
or combining video with a 6502 synch'd with a z80 programming a SID
and
TIA while running the composite video thru a locally programmed MMU
block for custom collision detection (between VIC2&TIA).

So our MMU isn't just a programmable memory router but can also load
function blocks to take the place of custom functions at the same
time. "


I think that's what still being discussed. Does that sound a bit over-
the-top?



Since programmable memory mapping and bus interfacing is central,
maybe it could be used to build old school arcade systems (a la MAME)
with real processor/video/audio chips.

Yes, if the design was very generic, like S-100, you could do anything.
As such, I think you should open the design up to other vintage machines.



Minimum number of cards for a C64 - 6510,VIC2,SID,MMU/
FPGA,CIA1&2,PORTS,RAM - 7?

Initially I broke it down in groups. All processors (8bit) on one
board, all video chips on another, all peripheral interfaces (cia/via)
another. I may still have that picture somewhere..

If there are so many boards, a cartridge case may be prudent (and
retro).




We discussed PCI-Express years ago...

Yeah, and it went about like the current "Maximum Safe IEC cable
length..." thread.


File it under - Communication to PC bus - topic.




IF it's a backplane system, can it support 16 bit configurations?

Not easily. I mean, you can put the extra data lines on the bus, but
what do you do if you want an 8 bit device to talk to a 16 bit one? The
8 bit device needs to perform two reads, but it can;t get at the high 8
bits of the data from the lower data lines.


Configure some kind of banking scheme so it can see a window of what
it needs when it needs it (?)


Just wondering if we're talking about a C64 board with a bunch of
sockets or a board for each chip.

More like a board for each IC. Otherwise, it can't be expanded. Maybe,
since some things are required (6510, ROM) together, they can be on the
same board.

An all-in-one C64 board may limit how it can be expanded? Maybe not
since the glue logic can be configured to reroute/exclude/include
chips from other boards?

It can, but that drives prices up.



In what way? Assume a single starter board that houses sockets for
6510,vic,sid,cia1&2. Why would this be more expensive than 7
individual boards? Imagine all the lines for each chip routed to the
bus, to be collected and configured by the MMU. I realize I'm speaking
out of my element here...



ok. As long as this slow down is synchronus inside the whole system ie
not slowing down just the processor, slowing down the VIC2 as well.

Yeah, hate to be the wet blanket, but if you underclock the VIC, you get
no picture.


Oh yeah. Now I remember! So we slow down the cpu and keep the VICs
access to memory at the same speed?



If you were planning on doing a run, boot rom is most important, then
speed...

Ah, k. That's the easier item to add.


:)


So it shows the pins of the real chips and the interface allows you to
wire things up in the glue logic? Perfect!

That was the idea.

You mentioned substituting newer VIAs for older. There are no
substitutes for the VIC and SID. Can another processor sub for the
6510?

A NMOS 6502 with a small CPLD to emulate address 0 and 1 would work.
The CPLD could live on a board under in between the 6502 socket rails,
making it a pin/compatible item.

But, I think the FPGA idea is better, because:

Fewer board types. All boards would have an FPGA and a loader flash.
The bus would also be on there.


I thought the FPGA would be more costly than fixing up a prefab'd
chip.

I think I'm getting lost here. You're suggesting for those who don't
have a spare 6510 to allow the FPGA to emulate it.


Then, you have a couple variants:

o Memory board (socket for RAM or ROM or both)
o digital IO board. Header for a custom IO connector or 2 (or more)
o Analog IO board (places for a bit of R2R ladders and such.


Great! So now we have a few custom interface boards IO/Audio/Video and
a memory board. I don't think people will want to really put in their
original rom chips (I could be wrong). I was thinking a pc ram
socket(s) and flash (minimal system).



You could buy a few boards and mash up a Z80 with a VIC, or Stella with
a SID, or whatever. The glue logic would be embedded in the FPGAs, so
no other chips are required. As a bonus, the FPGA designs, if they
could be made modular, could then be synthesized into small 40 pin .6"
boards to plug into a real 64. Thus, when the supply of real parts
dwindles, there will be pin cmpatible replacements.

Yes! And the hybrid computers people write great games or apps for can
be synthesized and embedded into keyboards and joysticks ;)



In this latter case, if you wanted to do a 16 bit or 32 bit computer, as
long as there enough pins on the bus, it would be a cinch.


Yes, the bus can always be expanded into a larger one - right?



This idea, or something like it, would appear to have lots of potential
audience (it's not even vintage computer related, as you could use it to
make new machine building blocks or something along those lines)

Of course, the key is the tool to build the "machine".


The key for the user. The key to the machine is that it can be
configured as desired with zero limitations.

A lot of these old arcade machines used multiple processors and
probably some complex timing requirements. Is all this really possible
to configure, using a few real processors, audio and video chips, ram
and an fpga for glue?
.

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