C64 Building Block Computer (was: IEEE 488 bus)
- From: Jim Brain <brain@xxxxxxxxxx>
- Date: Wed, 16 Jan 2008 18:57:46 GMT
christianlott1 wrote:
Of course you'll need to be able to configure it from a runningNote that softswitches drive costs up.
system. Configuring this profile can be done from whatever system is
set up to program it. I think jumpers are out of the question at most
levels ;)
Since programmable memory mapping and bus interfacing is central,Yes, if the design was very generic, like S-100, you could do anything. As such, I think you should open the design up to other vintage machines.
maybe it could be used to build old school arcade systems (a la MAME)
with real processor/video/audio chips.
We discussed PCI-Express years ago...Yeah, and it went about like the current "Maximum Safe IEC cable length..." thread.
IF it's a backplane system, can it support 16 bit configurations?Not easily. I mean, you can put the extra data lines on the bus, but what do you do if you want an 8 bit device to talk to a 16 bit one? The 8 bit device needs to perform two reads, but it can;t get at the high 8 bits of the data from the lower data lines.
Just wondering if we're talking about a C64 board with a bunch ofMore like a board for each IC. Otherwise, it can't be expanded. Maybe, since some things are required (6510, ROM) together, they can be on the same board.
sockets or a board for each chip.
It can, but that drives prices up.
An all-in-one C64 board may limit how it can be expanded? Maybe not
since the glue logic can be configured to reroute/exclude/include
chips from other boards?
ok. As long as this slow down is synchronus inside the whole system ieYeah, hate to be the wet blanket, but if you underclock the VIC, you get no picture.
not slowing down just the processor, slowing down the VIC2 as well.
If you were planning on doing a run, boot rom is most important, thenAh, k. That's the easier item to add.
speed...
So it shows the pins of the real chips and the interface allows you toThat was the idea.
wire things up in the glue logic? Perfect!
You mentioned substituting newer VIAs for older. There are noA NMOS 6502 with a small CPLD to emulate address 0 and 1 would work. The CPLD could live on a board under in between the 6502 socket rails, making it a pin/compatible item.
substitutes for the VIC and SID. Can another processor sub for the
6510?
But, I think the FPGA idea is better, because:
Fewer board types. All boards would have an FPGA and a loader flash. The bus would also be on there. Then, you have a couple variants:
o Memory board (socket for RAM or ROM or both)
o digital IO board. Header for a custom IO connector or 2 (or more)
o Analog IO board (places for a bit of R2R ladders and such.
You could buy a few boards and mash up a Z80 with a VIC, or Stella with a SID, or whatever. The glue logic would be embedded in the FPGAs, so no other chips are required. As a bonus, the FPGA designs, if they could be made modular, could then be synthesized into small 40 pin .6" boards to plug into a real 64. Thus, when the supply of real parts dwindles, there will be pin cmpatible replacements.
In this latter case, if you wanted to do a 16 bit or 32 bit computer, as long as there enough pins on the bus, it would be a cinch.
This idea, or something like it, would appear to have lots of potential audience (it's not even vintage computer related, as you could use it to make new machine building blocks or something along those lines)
Of course, the key is the tool to build the "machine".
Jim
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