Re: Context Switch Time



In article <7bcbfc95-eba8-4f17-be6f-db5f6ed1dc3c@xxxxxxxxxxxxxxxxxxxxxxxxxxxx>,
xakee <m.zaki.mirza@xxxxxxxxx> wrote:
On Dec 4, 7:25 pm, Chris Friesen <cbf...@xxxxxxxxxxxxx> wrote:
llothar wrote:
On Dec 4, 2:40 pm, Dmitriy Vyukov <dvyu...@xxxxxxxxx> wrote:
2.4 GHz P4 - so it's about 650 ns
Surprisingly low when i remember all this FUD from the Linux side
telling me that scheduling on Windows sucks.

This measurement is for thread context switch. Traditionally the big
difference has been in process context switch times.

Also, "scheduling sucks" can be much more than just context switch
times. You also need to look at *what* is being scheduled.

Chris

Windows NT primarily (and only) schedules threads, not processes.

Well, yes, that's true of most OSes that have threads support. However,
if the outgoing thread and the incoming thread are from the same
process, you don't need to reload the MMU context or force a TLB flush,
which is a *huge* performance win.

On x86 architectures, MOV CR3, EAX is a very slow instruction because it
forces a TLB flush and will have longer-term side effects like slowing
down the next few instruction fetches while the TLB gets refilled.

The same applies to most of the other architectures that I'm familiar
with (includes PPC, MIPS, ARM, Sparc). The MIPS MMU is interesting in
that it's got a context ID stored in the TLB so you won't need to flush
the TLB on (most) context switches. The catch is that the context ID is
only 8 bits, so it gets complicated if you have more than 256 processes
alive at any given time, and it's another ID to manage.

But that's a different kettle of fish.
--
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Relevant Pages

  • Re: Context Switch Time
    ... telling me that scheduling on Windows sucks. ... Traditionally the big difference has been in process context switch times. ... "scheduling sucks" can be much more than just context switch times. ...
    (comp.programming.threads)
  • Re: Context Switch Time
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    (comp.programming.threads)
  • Re: Quation about HZ kernel option
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  • Re: About TLB in lower-level caches
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