DASIP Workshop 2007 > Call for Papers: Extended Deadline: June 1, 2007
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- Date: 21 May 2007 09:11:39 -0800
Extended submission deadline:
June 1, 2007
Call for Papers
Workshop on Design and Architectures
for Signal and Image Processing
DASIP 2007
http://www.ecsi.org/dasip
Maison des Micro et Nano Technologies, MINATEC
Grenoble, France
November 27-29, 2007
The development of complex applications involving signal, image and
control processing, is classically divided into three consecutive steps:
a theoretical study of the algorithms, a study of the target
architecture, and finally the implementation. Such a linear design flow
is reaching its limits due to the intense pressure on design cycle and
strict performance constraints. The approach, called
Algorithm-Architecture-Matching aims to leverage the design flow by a
simultaneous study of both algorithmic and architectural issues, taking
into account multiple design constraints, as well as algorithm and
architecture optimizations.
Introducing new design methodologies is necessary when facing the new
emerging applications as, for example advanced mobile communication
systems or smart sensors based systems. This forms a driving force for
the future evolutions of embedded system designs methodologies.
The research community in Europe addressing these issues is very active
both in academy and industry. The goals of this workshop are to present
the latest results in the domain of design and architecture for signal
and image processing and to initiate a regular meeting of European
researchers addressing this topic.
The DASIP Workshop will give the opportunity for researchers to exchange
the ideas and to build the collaboration on emerging topics and
technologies. It also aims to strength the links between the European
Information Society Technologies (IST) priorities and the researchers in
the domain of design and architecture for signal and image processing.
The DASIP workshop results from the success for more than ten years of
the French workshop on Algorithm-Architecture-Matching. The first
edition called "Workshop on Algorithm Architecture Adequation" was held
in Lannion in 1992 (AAA 1992). During eight years a two-year event was
organized, AAA 1994 in Grenoble, AAA 1996 in Toulouse , AAA 1998 in
Saclay and AAA 2000 in Rocquencourt. In 2002 thanks to its widespread
success the workshop was extended to all francophone countries, JFAAA
2002 was held in Monastir and JFAAA 2005 in Dijon. Each edition was a
great success gathering more than one hundred of researchers from
industry, academia and government organizations. For the 2007 edition
the workshop is extended to the Europe in order to gather our community.
We believe that DASIP 2007 will promote and strengthen the links between
European researchers and will become an important event.
The topics of DASIP 2007 include but are not limited to:
Methods and tools for Algorithm-Architecture-Matching
- System level design and hardware/software codesign
- RTOS for embedded systems
- Formal models and transformations
- Algorithm transformations and metrics
- Communication synthesis
- Architectural and logic synthesis
- Design verification, fault tolerance
- Performance analysis and estimations
- Rapid system prototyping, embedded software
- Embedded system security
New and emerging architectures and technologies
- SoC and MPSoC
- Reconfigurable ASIP
- FPGA, dynamic reconfigurable systems
- Asynchronous circuits (self-timed)
- Analog circuits and mixed-signal circuits
- Biologically based or biologically inspired systems
- MEMS, bioMEMS
- Nano-technologies, quantum computing
Smart sensors
- Vision and audio sensor
- Fingerprint sensor, biosensor
- Structurally-embedded sensor
- Sensing requirements for active control systems
- Distributed and multiplexed sensors, sensors network
- Adaptive sensor, evolutionary sensor
- Sensor for health monitoring
- Sensor system monitoring
- Environmental monitoring
Applications
- Embedded systems for automotive
- Embedded systems for health
- Embedded platforms for multimedia and telecom
- Analog mixed-signal design challenge
- Ambient intelligence, ubiquitous computing
- Wearable computing,
- Handheld devices (smart cameras, PDAs, GPSs)
- Security systems, cryptography
- Object recognition and tracking
Special sessions and demonstrations
Six special sessions are planned during the workshop. Two will focus on
design methodologies, one on new architectures for signal and image
processing, one on smart sensors and one on case study dealing with
signal and image processing implementations. The sixth one will
emphasize European projects in order to promote current project and
demonstrate original works.
Demonstrations are also welcome and we encourage Authors to present
their work. A special time slot will be allocated during the workshop in
order to allow participants to attend demonstrations.
Instruction for Authors
Electronic paper submission requires a full paper, up to 8 double-column
IEEE format pages, including figures and references. A special issue in
one of the Eurasip journals (e.g. Hindawi's Journal of embedded systems)
is planned after the workshop in order to publish the best papers of the
workshop.
Demonstration papers should not exceed 1 double-column IEEE format page
long.
Important Dates
- Deadline for paper submission: June 1, 2007
- Notification of paper acceptance: July 20, 2007
- Final camera-ready papers due: October 12, 2007
Committees
General Co-chairs
Stéphane Mancini, Lis, France
Sébastien Roux, France Télécom, France
Program Co-chairs
Milojevic Dragomir, University of Bruxelles, Belgium
Gogniat Guy, Lester, France
Program Committee
Weber Serge, Lien, France
Soares Indrusiak Leandro, T. U. of Darmstadt, Germany
Shawky Mohamed M.,Heudiasyc, France
Rupp Markus, Vienna U. of Technology, Austria
Robert Frederic, University of Bruxelles, Belgium
Plaks Toomas, London, England
Paindavoine Michel, Le2i, France
Medulla Giuseppe, Atmel, Italy
Mattavelli Marco, Epfl, Switzerland
Mamalet Franck, France Télécom, France
Le Moullec Yannick, Aalborg University, Denmark
Garda Patrick, U. Pierre Et Marie Curie, France
Galajda Pavol, T. U. of Kosice, Slovakia
Erdogan Ahmet, U. of Edinburgh, Scotland
Bouridane Ahmed, Queen's U. Belfast, Ireland
Bobda Christophe, Kaiserslautern U., Germany
Bielecki Wlodzimierz, Politechnika Szczecinska, Poland
Becker Juergen, Karlsruhe University, Germany
Aridhi Slaheddine, Texas Instruments, France
Amira Abbes, Brunel University, England
Abid Mohamed, Enis, Tunisia
Yves Sorel, INRIA, France
Drutarovsky Milos, T. U. of Kosice, Slovakia
Christian Piguet, CSEM, Switzerland
Peter Koch, CSDR, Denmark
Hannig Frank, University of Erlangen-Nuremberg, Germany
Workshop Web Site
Please visit the workshop web site for paper submission, registration,
and current workshop information.
Workshop Web Site: <http://www.ecsi.org/dasip/>http://www.ecsi.org/dasip/
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