Re: problem with VxWorks resident


hi Gvarndell

Is your ROM able to support burst access?
No. my flash is Am29F010B.
you have got an idea?
Because I don't understand the problem if my ROM don't able to
support burst access.
Thanks for you answers.
Best regards
LuckeVador80

hi Michael R. Kesti

I try your solution. I remove all regions except your boot ROM and main
RAM.
But I have always the error (cacheEnable).



My tab sysPhysMemDesc[] (after to have remove all regions) of my
file sysLib.c:

PHYS_MEM_DESC sysPhysMemDesc [] =
{
{
/* Vector Table and Interrupt Stack */

(void *) LOCAL_MEM_LOCAL_ADRS,
(void *) LOCAL_MEM_LOCAL_ADRS,
RAM_LOW_ADRS ,
VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE |
VM_STATE_MASK_CACHEABLE |
VM_STATE_MASK_GUARDED,
VM_STATE_VALID | VM_STATE_WRITABLE |
VM_STATE_CACHEABLE_NOT |
VM_STATE_GUARDED_NOT
},

{
/* Local DRAM - MUST be second entry in table, see sysHwInit */

(void *) RAM_LOW_ADRS,
(void *) RAM_LOW_ADRS,
LOCAL_MEM_SIZE - RAM_LOW_ADRS - USER_RESERVED_MEM,
VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE |
VM_STATE_MASK_CACHEABLE |
VM_STATE_MASK_GUARDED,
VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE |
VM_STATE_GUARDED_NOT
},

// {
/*----- Modif du 06/07/2001 par JFB: Internal memory ------*/

/* (void *) INTERNAL_MEM_MAP_ADDR,
(void *) INTERNAL_MEM_MAP_ADDR,*/
// INTERNAL_MEM_MAP_SIZE, /* 64 k - Internal Memory Map
*/
/* VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE |
VM_STATE_MASK_CACHEABLE |
VM_STATE_MASK_GUARDED,
VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT
|
VM_STATE_GUARDED_NOT
},*/

// {
/*- Modif du 06/07/2001 par JFB: non-cachable RAM for ETHERNET
driver -*/

/* (void *) NON_CACHABLE_MEM,
(void *) NON_CACHABLE_MEM,
NON_CACHABLE_MEM_SIZE,
VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE | VM_STATE_MASK_CACHEABLE
|
VM_STATE_MASK_GUARDED,
VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT
|
VM_STATE_GUARDED
},*/

{
/*----- Modif du 06/07/2001 par JFB: Flash memory ------*/

(void *) ROM_BASE_ADRS,
(void *) ROM_BASE_ADRS,
ROM_SIZE, /* Flash memory */
VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE |
VM_STATE_MASK_CACHEABLE |
VM_STATE_MASK_GUARDED,
VM_STATE_VALID | VM_STATE_WRITABLE |
VM_STATE_CACHEABLE_NOT |
VM_STATE_GUARDED_NOT
},

// {
/*----- Modif du 06/07/2001 par JFB: CS2 <--> FPGA ------*/

/* (void *) 0x02300000,
(void *) 0x02300000,
0x00001000,
VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE |
VM_STATE_MASK_CACHEABLE |
VM_STATE_MASK_GUARDED,
VM_STATE_VALID | VM_STATE_WRITABLE | VM_STATE_CACHEABLE_NOT
|
VM_STATE_GUARDED
},*/

/*----- Modif du 20/07/2001 par JFB: CS3 <--> WATCH DOG ------*/
/* {
(void *) 0x02380000,
(void *) 0x02380000,
0x00001000,
VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE |
VM_STATE_MASK_CACHEABLE |
VM_STATE_MASK_GUARDED,
VM_STATE_VALID | VM_STATE_WRITABLE_NOT |
VM_STATE_CACHEABLE_NOT |
VM_STATE_GUARDED
},*/

/*----- Modif du 20/07/2001 par JFB: CS4 <--> NU ------*/
/* {
(void *) 0x02400000,
(void *) 0x02400000,
0x00001000,
VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE |
VM_STATE_MASK_CACHEABLE |
VM_STATE_MASK_GUARDED,
VM_STATE_VALID | VM_STATE_WRITABLE |
VM_STATE_CACHEABLE_NOT |
VM_STATE_GUARDED
},*/

/*----- Modif du 20/07/2001 par JFB: CS5 <--> NU ------*/
/* {
(void *) 0x02480000,
(void *) 0x02480000,
0x00001000,
VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE |
VM_STATE_MASK_CACHEABLE |
VM_STATE_MASK_GUARDED,
VM_STATE_VALID | VM_STATE_WRITABLE |
VM_STATE_CACHEABLE_NOT |
VM_STATE_GUARDED
},*/

/*----- Modif du 20/07/2001 par JFB: CS6 <--> NU ------*/
/* {
(void *) 0x02500000,
(void *) 0x02500000,
0x00001000,
VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE |
VM_STATE_MASK_CACHEABLE |
VM_STATE_MASK_GUARDED,
VM_STATE_VALID | VM_STATE_WRITABLE |
VM_STATE_CACHEABLE_NOT |
VM_STATE_GUARDED
},*/

/*----- Modif du 20/07/2001 par JFB: CS7 <--> NU ------*/
/* {
(void *) 0x02580000,
(void *) 0x02580000,
0x00001000,
VM_STATE_MASK_VALID | VM_STATE_MASK_WRITABLE |
VM_STATE_MASK_CACHEABLE |
VM_STATE_MASK_GUARDED,
VM_STATE_VALID | VM_STATE_WRITABLE |
VM_STATE_CACHEABLE_NOT |
VM_STATE_GUARDED
},*/

#ifdef INCLUDE_FLASH
/* TODO - flash memory space with *NO* GUARDED bit set */
#endif

};

--

.

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