Re: Re-install Warp 4.52

Sir:

Daniela Engert wrote:

I am going to hold off making my reply to dani's post until I report what I found on My search on this subject. I did make one mis-statement of fact: neither W2K nor XP have MSI support.

Microsoft is going to release their new client operating system that they call Vista and a still unnamed server product of the Longhorn project; they say in 2006. Vista is a transitional product in that many technologies of XP/W2K are being phased out in favor of new stuff. No, I am not going to talk about what new in this Windows product, except where it impinges upon the subject of this sub thread. As we all know too well, the standard committees proposes new standards, Microsoft tells us what will be implemented, and the rest of the industry does what Microsoft says to do. We live in that hardware world that Microsoft dictates. So knowing what Microsoft tells the industry, allows us to prepare for the future, which is the subject of this sub thread.

Microsoft is requiring all 64-bit machines and all machines that have a 64-bit mode to install their Firmware 3.0 specification BIOS, in order to run Vista (Vista will check and refuse to load if it is not there). This firmware is Microsoft's version of PCISIG's PCI 3.0 specification. In it Microsoft requires the BIOS to enumerate all devices and set (enable) their MSI (software interrupt). In doing this it creates a new table that is not compatible with the older tables CFC/CF8 that OS/2 knows and uses. These older tables are created only if BIOS encounters MSI incompatible hardware. For OS/2 this means that on existing hardware which has the ubiquitous ISA bus in south bridge chips, OS/2 will continue to work without changes. <http://download.microsoft.com/download/9/8/f/98f3fe47-dfc3-4e74-92a3-088782200fe7/TWAR05005_WinHEC05.ppt>

Aside: it does mean that if you wish to run Vista on your previous to about six months ago purchased IA64 or AMD64 machine, you'll be installing a BIOS update, assuming that your main board vendor creates one. Vista will run (slowly) on 32-bit machines without BIOS updates. Note that PCISIG lists no BIOS compatible with PCI-e. Also, aside, Star Office will display these Powerpoint slide shows.

Microsoft made an announcement that they will not support ISA bus on the next version of their Windows product, the one beyond Vista. <http://www.microsoft.com/whdc/system/bus/PCI/ISA-bus.mspx> Since we know that Microsoft releases new versions about once every four or five years, this means that Microsoft does not expect the now ubiquitous ISA bus to be around then. From "PCI Express and Windows Longhorn" <http://download.microsoft.com/download/1/8/f/18f8cee2-0b64-41f2-893d-a6f2295b40c8/TW04092_WINHEC2004.ppt> we see slide seven saying 'do NOT assume CF8/CFC available' & 'drivers must NOT use CF8/CFC', which I seen elsewhere in the contex of PIC and APIC methods. Slide 21 saying 'Root/switch ports MUST implement MSI as the system interrupt.' And slide 42 saying 'PCI-e docking stations does not include devices that can not be enumerated (such as Super I/O).' This means that Microsoft is preparing Vista to work in a system that does not have ISA bus (and any APIC), nor any PCI card before PCI 2.3 standard. On such a system OS/2 as now available is DEAD.

Intel has provided a working ACPI module that conforms to the old PCI 2.1 standard, the out going standard. This is the Unix version. They also have a Windows version for download at the same place. <http://developer.intel.com/technology/iapc/acpi/downloads/acpica-unix-20051117.tar.gz>
A port of this is most likely the source code of the IBM version that they ship as OS2ACPI.PSD. Why do I mention this? Even though the new BIOS standard will need code developed to work with it, the old code is still valid on all 32-bit platforms and much of it can be extended in support of the new BIOS. We know that ACPI hot plug notification and ACPI PME notification should not be used with the new BIOS and they speak of _OSC method. However, I don't see Microsoft's firmware 3.0 specification in the wild. So the only way we can get it is to kowtow to Microsoft before downloading it.

Some current South bridge designs:
<http://www.national.com/pf/CS/CS5530A.html>
<http://www.uli.com.tw/eng/products/product_detail.php?pserno=79>
<http://www.smsc.com/main/catalog/slc90e66.html#Block%20Diagram>
A new chip without ISA support:
<http://www.hypertransport.org/products/productdetail.cfm?RecordID=56> and a board using it:
<http://www.asrock.com/product/product_939A8X-M.htm>, but it has an external SuperIO chip. You know that this was not the chip that I had seen earlier and am not sure about its lack of ISA bus. I also attempted to find that announcement by Intel of new directions for a replacement for the FSB in its multicore processor, but I got tired of looking at the screen. Maybe someone else has seen it?

Ruediger Ihle wrote:

On Mon, 5 Dec 2005 04:13:29 UTC, "William L. Hartzell" <wlhartzell@xxxxxxxxxxx> wrote:


You miss the point entirely. When the hardware needs to raise an
interrupt, if configured for MSI, no OS/2 irq-using driver will function. When hardware manufacturer remove the PIC circuits and the traces to each slot for irq., making mandatory the use of MSI, where will OS/2 be then? This has every thing to do with device driver code. No OS/2 device driver queries if MSI is enabled and configures itself to use MSI.


I think it's about time you read the full story about interrupt delivery on x86 hardware, in particular the stuff on local APICs (a vital element in every CPU since the mid 90's), IOAPICs, xAPICs - you name it. For about 10 years now, there's no PIC to be found; the legacy PIC functionality is just kind of emulated by the APICs. By design, OS/2 doesn't require legacy PICs at all. The abstraction of system units (not just devices!) requesting service is done through PSDs (platform specific driver).

And what do you do when there is no APIC circuits anywhere? APIC is not required, if SMI is used.

I don't think that Daniela is missing anything. The idea is to hide the details of how the interrupt is delivered from individual drivers.
It is not the bussiness of the driver for a specific device to assign
message addresses and message data or otherwise mess with the MSI registers. This has to be done by the bus driver, which case of OS/2
will most likely be a PSD.


Exactly. The PCI specification explicitly states that software drivers have to stay away from the MSI circuitry. A driver has to provide entry points where the OS delivers device service requests, and report back to the OS when it is done with it.

Thanks for agreeing with me.
I can very well imagine the concept of a PSD, that would maintain a mapping between message address/data and a virtual IRQ number. This
virtual IRQ number can be written to the device's PCI config space
and we are done. For the device specific driver it will not make any difference if running via pin assertation or MSI.


There's no need at all for a software mapping from MSI messages to IRQs. This is done by the LAPIC (built into every CPU) and assorted, platform specific hardware.

For more on this subject, have a look at http://www.microsoft.com/whdc/system/bus/pci/default.mspx

When I read the tone of your posting I went out to see what I could find, and lo! this site popped up. What I read there I interpret to support my contention that MSI (software interrupts) support is required in all future device drivers and in system code.
--
Bill
Thanks a Million!
.

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