Re: Success! [ was Minimal 8-bit code for upd765 FDD initial program load]



On Sep 23, 8:09 am, s100fan <s100...@xxxxxxxxx> wrote:
I'm delighted to report successful boot to CP/M after 18
months of twists and turns.

This was ONLY possible due to advice and assistance from many on this
list and some in other forums.  Plus the amazing wealth of experience
and software preserved on the Web, freely contributed by generous
individuals.

I came to this project very naive about computer hardware. I have worn
out the patience of some helpers, by not even knowing how to describe
my problems
accurately. I have learned a great deal about hardware and about CP/M
along the way.

At this milestone, I specially thank Herb Johnson, who introduced me
to
this list and has offered extensive and patient advice in off-list
exchanges right up until the last few days.

The resurrection was also only possible with the help of a local
Australian who lurks on this list but prefers not to be identified -
his professional hardware skills, diagnostic tools and S-100
experience were critical in fault-finding the hardware.

Others on this list who offered direct help and advice are Max Scane,
Keith Harrell, Roman Sigmund, James Moxham, John Monahan, Andrew
Lynch, Barry Watzmann, Dave Dunfield, John Crane, and and many more
indirectly.

It turned out that the hardware issues were not too many, but
hard to identify.

A few tantalum caps around the VRs had blown. So for good measure all
tantalums were replaced on every card.

The DRAM, once it could be properly tested, had only one faulty 4116
that happened to be sitting in a parity-check slot. It had problems
with the
bus driver chips on that board

Several buffer chips and a small number of other logic chips were
tracked down as faulty and replaced. The crystal on the I/O board was
replaced.

I built a ROM  monitor to progressively prove the hardware interfaces:
first the serial monitor, then keyboard input. With that the monitor
could
provide rudimentary software debug - read/write/test ports and RAM.

Then I re-wrote a routine for "goto breakpoint and display registers
and flags"
without using RST instructions.

The final hurdle was to construct Initial Program Loader code
discussed in this thread.

After looking at a range of options and suggestions, I went back and
built the load
code using mostly warm boot code from my original BIOS source, adapted
with reference to a compiled BIOS I lifted from the system tracks of a
known-good (twenty years ago) disk (an image made with Dave Dunfield's
ImageDisk) and cross-referencing to Digital Research CP/M 2.2
Alteration Guide.

It was quite an experience today to see that "A>" and to start reading
all those 5 1/4" floppies, stored for twenty years and data still
good. Now I have to remember what all that data and Assembler and
MBasic programs
were about - it must have seemed important at the time.

Next steps are:

1. Get 2nd FDD going so copy/backup is again possible (FDD B stopped
responding 20yrs ago).

2. Set up for simple file exchange with PC environment via serial
ports

     - Any recommendations on simplest way to do this with serial
protocols at CP/M and DOS ends?

Thanks again to all helpers,
Richard

p.s. I'm happy to share the ROM Monitor source code with anyone
interested. It tests and confirms console, RAM, diskette, keyboard,
then goes to Zapple-like menu of modules to read/write/test ports and
RAM, plus execute to breakpoint and examine, or boot to CP/M. Fits in
2732 EPROM with plenty of room for extra modules.

Congratulations! Sounds like that took a lot more perseverance than I
would have been able to muster...

I'd certainly be interested in perusing that ROM code; might have some
useful tips for something I'm working on.

If you're not going to post it publicly somewhere, I'd appreciate very
much if you could send me a copy at (phonetically):
Delta Mike Five Six One at Torfree dot Net

Thank you, and enjoy the fruits of your labour ;-)

mike
.



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