Re: Event Driven State Machine
- From: Brian Drummond <brian_drummond@xxxxxxxxxxxxx>
- Date: Tue, 07 Oct 2008 12:45:55 +0100
On Mon, 6 Oct 2008 16:46:59 -0700 (PDT), "M. Norton"
<remillard@xxxxxxxxx> wrote:
However, with this DAC, it does not have an
interior clock, and is completely driven by a SCLK input that is only
occasionally active, during
data transfers.
So I thought I'd try to model this device the way it behaves, but the
lack of a consistent clock makes things decidedly tricky (not to
mention the bidirectional port.)
Being a DAC model, it only has to work in simulation, so remarks about
synthesis are for background info.
So, some questions
1) If I suspend the process inside a procedure, when the process re-
enters, will it jump to the procedure the way it's supposed to? I
think this is true, but I need to check.
if it suspends at a WAIT is in the procedure, it will restart after the
WAIT.
And passing signals to the procedure as arguments will work nicely...
BUT if you are always connecting the same signal to the procedure AND
the procedure is defined in the process; the procedure can see the
signal and use the process's driver on the signal, so you don't need the
arguments. (If you wanted the procedure to read/write different signals
on calls in different places, you would need arguments to connect them)
(Synthesis: WAITs on more than one signal are not generally
synthesisable, even though the hardware may be achievable by hand.
Also note: one synthesis tool (Xilinx XST) does not obey signals passed
to procedures as arguments correctly; it applies variable assignment
rules to them)
2) In that IDLE state, I select the next state based on a bit. From
what I can tell then the flow will move to end case, and exit the
process and.... a miracle happens? How can I get it to re-enter the
process to pick up on the next state? I don't have a clock to depend
on here, it's entirely based on some level transitions, so I can't put
in a "wait until rising_edge(clk)" for re-entry.
It will re-enter at "begin" when an event on any signal in its
sensitivity list occurs... (and its sensitivity list is empty, so...)
3) If it did re-enter after the idle... will it try to run those
default assignments and wait for reset again? That could be very bad.
Yes.
But you don't have to let the process exit in the first place.
Place the case statement in an infinite loop, and check that each path
round the loop has a "Wait" somewhere. Then it won't need a sensitivity
list because re-entering it isn't an issue; it never exits, and it is
entered ONCE at simulation time 0.
Another approach would be to only run the reset statements on reset, and
to incorporate the Reset event into the Case statement, or
If reset event Then
reset actions;
Else
case statement;
end if;
so that each pass through the process takes the appropriate path on the
appropriate event. Then you do need the sensitivity list.
- Brian
.
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