comp.lang.vhdl

Date Index

Re: Can I do this?, Mike Treseler
about negative in numeric_std package, move
- Re: about negative in numeric_std package, KJ
  - Re: about negative in numeric_std package, move
- Message not available
  - Re: about negative in numeric_std package, Andy
    - Re: about negative in numeric_std package, David Bishop
vhdl coding for fetching into memory, shweta
- Re: vhdl coding for fetching into memory, Mike Treseler
- Re: vhdl coding for fetching into memory, Kevin Neilson
default for last event time, JohnSmith
- Re: default for last event time, kennheinrich
Modelsim vs. Synplify Pro frustrations, Marty Ryba
- Re: Modelsim vs. Synplify Pro frustrations, Kim Enkovaara
- Message not available
  - Re: Modelsim vs. Synplify Pro frustrations, Marty Ryba
    - Re: Modelsim vs. Synplify Pro frustrations, Mike Treseler
    - Re: Modelsim vs. Synplify Pro frustrations, Brian Drummond
Re: uniform does not give required results, Mike Treseler
- Message not available
  - Re: uniform does not give required results, Mike Treseler
- Message not available
  - Message not available
    - Message not available
    - Re: uniform does not give required results, Tricky
ModelSim Newbie , Need Help in Simulation, KellyB
- Message not available
  - Message not available
    - Message not available
    - Re: ModelSim Newbie , Need Help in Simulation, KellyB
Re: get back sdf annotated vhd file, KJ
signal change not detected, koyel . aphy
- Message not available
  - Re: signal change not detected, koyel . aphy
- Message not available
  - Re: signal change not detected, KJ
    - Re: signal change not detected, koyel . aphy
    - Message not available
    - Re: signal change not detected, koyel . aphy
bit stuffing, blackpadme
- Re: bit stuffing, Muzaffer Kal
- Re: bit stuffing, Mike Treseler
- Message not available
  - Re: bit stuffing, blackpadme
vital question, JohnSmith
- Re: vital question, Andy
  - Re: vital question, JohnSmith
    - Re: vital question, kennheinrich
    - Re: vital question, Colin Paul Gloster
    - Re: vital question, kennheinrich
    - Re: vital question, kennheinrich
    - Re: vital question, Colin Paul Gloster
FPGA/CPLD Design Group on LinkedIn, cpld-fpga-asic
Mixed clocked/combinatorial coding styles (another thread), whygee
- Message not available
  - Re: Mixed clocked/combinatorial coding styles (another thread), whygee
    - Re: Mixed clocked/combinatorial coding styles (another thread), whygee
    - Re: Mixed clocked/combinatorial coding styles (another thread), Mike Treseler
    - Re: Mixed clocked/combinatorial coding styles (another thread), whygee
    - Re: Mixed clocked/combinatorial coding styles (another thread), KJ
    - Re: Mixed clocked/combinatorial coding styles (another thread), whygee
    - Re: Mixed clocked/combinatorial coding styles (another thread), rickman
    - Re: Mixed clocked/combinatorial coding styles (another thread), whygee
    - Re: Mixed clocked/combinatorial coding styles (another thread), rickman
    - Re: Mixed clocked/combinatorial coding styles (another thread), KJ
    - Re: Mixed clocked/combinatorial coding styles (another thread), whygee
    - Re: Mixed clocked/combinatorial coding styles (another thread), KJ
    - Re: Mixed clocked/combinatorial coding styles (another thread), Andy
    - Re: Mixed clocked/combinatorial coding styles (another thread), rickman
    - Re: Mixed clocked/combinatorial coding styles (another thread), Kim Enkovaara
    - Re: Mixed clocked/combinatorial coding styles (another thread), KJ
    - Message not available
    - Re: Mixed clocked/combinatorial coding styles (another thread), Mike Treseler
- Message not available
  - SPI sampling clock (was Re: Mixed clocked/combinatorial coding styles (another thread)), whygee
    - Re: SPI sampling clock (was Re: Mixed clocked/combinatorial coding styles (another thread)), KJ
Use for 'simple_name attribute, Reuven
- Re: Use for 'simple_name attribute, Mike Treseler
- Re: Use for 'simple_name attribute, rickman
  - Message not available
    - Message not available
    - Re: Use for 'simple_name attribute, kennheinrich
Very less resource fixed point 32x32 bit multiplier and 32/32 divider, Pratap
- Re: Very less resource fixed point 32x32 bit multiplier and 32/32 divider, whygee
- Message not available
  - Re: Very less resource fixed point 32x32 bit multiplier and 32/32 divider, Kevin Neilson
Mixed clocked/combinatorial coding styles, Jonathan Bromley
- Re: Mixed clocked/combinatorial coding styles, Jonathan Bromley
- Re: Mixed clocked/combinatorial coding styles, kennheinrich
  - Re: Mixed clocked/combinatorial coding styles, Jonathan Bromley
- Re: Mixed clocked/combinatorial coding styles, rickman
  - Re: Mixed clocked/combinatorial coding styles, Jonathan Bromley
    - Re: Mixed clocked/combinatorial coding styles, rickman
    - Re: Mixed clocked/combinatorial coding styles, Jonathan Bromley
    - Re: Mixed clocked/combinatorial coding styles, Marcus Harnisch
    - Re: Mixed clocked/combinatorial coding styles, Tricky
    - Re: Mixed clocked/combinatorial coding styles, Jonathan Bromley
    - Re: Mixed clocked/combinatorial coding styles, rickman
    - Re: Mixed clocked/combinatorial coding styles, Jonathan Bromley
    - Re: Mixed clocked/combinatorial coding styles, KJ
    - Re: Mixed clocked/combinatorial coding styles, Andy
    - Re: Mixed clocked/combinatorial coding styles, KJ
    - Re: Mixed clocked/combinatorial coding styles, Kim Enkovaara
    - Re: Mixed clocked/combinatorial coding styles, Mike Treseler
    - Re: Mixed clocked/combinatorial coding styles, rickman
    - Message not available
    - Re: Mixed clocked/combinatorial coding styles, KJ
    - Re: Mixed clocked/combinatorial coding styles, Mike Treseler
    - Re: Mixed clocked/combinatorial coding styles, rickman
    - Re: Mixed clocked/combinatorial coding styles, Mike Treseler
    - Re: Mixed clocked/combinatorial coding styles, rickman
    - Re: Mixed clocked/combinatorial coding styles, Mike Treseler
    - Message not available
    - Re: Mixed clocked/combinatorial coding styles, rickman
    - Re: Mixed clocked/combinatorial coding styles, Mike Treseler
    - Re: Mixed clocked/combinatorial coding styles, Andy
    - Re: Mixed clocked/combinatorial coding styles, Paul Taylor
    - Message not available
    - Message not available
    - Re: Mixed clocked/combinatorial coding styles, rickman
    - Re: Mixed clocked/combinatorial coding styles, Andy
    - Re: Mixed clocked/combinatorial coding styles, rickman
    - Re: Mixed clocked/combinatorial coding styles, Andy
    - Re: Mixed clocked/combinatorial coding styles, Mike Treseler
    - Message not available
    - Message not available
    - Re: Mixed clocked/combinatorial coding styles, rickman
    - Re: Mixed clocked/combinatorial coding styles, Paul Taylor
    - Message not available
    - Message not available
    - Re: Mixed clocked/combinatorial coding styles, Mike Treseler
    - Re: Mixed clocked/combinatorial coding styles, Paul Taylor
    - Re: Mixed clocked/combinatorial coding styles, Martin Thompson
    - Re: Mixed clocked/combinatorial coding styles, KJ
    - Message not available
    - Re: Mixed clocked/combinatorial coding styles, Andy
    - Message not available
    - Message not available
    - Re: Mixed clocked/combinatorial coding styles, rickman
    - Message not available
    - Re: Mixed clocked/combinatorial coding styles, rickman
    - Re: Mixed clocked/combinatorial coding styles, KJ
    - Re: Mixed clocked/combinatorial coding styles, Kim Enkovaara
    - Re: Mixed clocked/combinatorial coding styles, rickman
    - Re: Mixed clocked/combinatorial coding styles, KJ
    - Re: Mixed clocked/combinatorial coding styles, Andy
    - Re: Mixed clocked/combinatorial coding styles, Kim Enkovaara
    - Re: Mixed clocked/combinatorial coding styles, rickman
    - Message not available
    - Re: Mixed clocked/combinatorial coding styles, rickman
    - Message not available
    - Message not available
    - Re: Mixed clocked/combinatorial coding styles, KJ
    - Re: Mixed clocked/combinatorial coding styles, rickman
    - Message not available
    - Message not available
    - Re: Mixed clocked/combinatorial coding styles, KJ
    - Re: Mixed clocked/combinatorial coding styles, Andy
    - Re: Mixed clocked/combinatorial coding styles, rickman
    - Re: Mixed clocked/combinatorial coding styles, Kim Enkovaara
    - Re: Mixed clocked/combinatorial coding styles, rickman
    - Re: Mixed clocked/combinatorial coding styles, Kim Enkovaara
  - Re: Mixed clocked/combinatorial coding styles, Mike Treseler
  - Re: Mixed clocked/combinatorial coding styles, Brian Drummond
    - Re: Mixed clocked/combinatorial coding styles, rickman
    - Re: Mixed clocked/combinatorial coding styles, Brian Drummond
- Re: Mixed clocked/combinatorial coding styles, Mike Treseler
- Re: Mixed clocked/combinatorial coding styles, Ralf Hildebrandt
  - Re: Mixed clocked/combinatorial coding styles, rickman
    - Re: Mixed clocked/combinatorial coding styles, Jonathan Bromley
Initialization of an unconstrained array object to the null array, jens
- Re: Initialization of an unconstrained array object to the null array, sandeep
- Re: Initialization of an unconstrained array object to the null array, Tricky
  - Re: Initialization of an unconstrained array object to the null array, Alan Fitch
    - Re: Initialization of an unconstrained array object to the null array, Alan Fitch
    - Re: Initialization of an unconstrained array object to the null array, jens
    - Re: Initialization of an unconstrained array object to the null array, jens
Ways to create a variable multi-tap delay line; and if/generate usage, Marty Ryba
- Re: Ways to create a variable multi-tap delay line; and if/generate usage, JK
  - Re: Ways to create a variable multi-tap delay line; and if/generate usage, sandeep
- Re: Ways to create a variable multi-tap delay line; and if/generate usage, Tricky
  - Re: Ways to create a variable multi-tap delay line; and if/generate usage, Tricky
    - Re: Ways to create a variable multi-tap delay line; and if/generate usage, Marty Ryba
- Re: Ways to create a variable multi-tap delay line; and if/generate usage, kennheinrich
nibz version 15 NEW! DMA Bus, jacko
- Re: nibz version 15 NEW! DMA Bus, jacko
  - Re: nibz version 15 NEW! DMA Bus, Symon
    - Re: nibz version 15 NEW! DMA Bus, jacko
    - Re: nibz version 15 NEW! DMA Bus, Symon
    - Re: nibz version 15 NEW! DMA Bus, jacko
state machine question, logitech
- Re: state machine question, rickman
  - Re: state machine question, logitech
    - Re: state machine question, rickman
    - Re: state machine question, logitech
    - Re: state machine question, whygee
    - Re: state machine question, Ralf Hildebrandt
Modelsim .asm files, oz
- Re: Modelsim .asm files, Mike Treseler
  - Re: Modelsim .asm files, Jonathan Bromley
- Re: Modelsim .asm files, James Unterburger
  - Re: Modelsim .asm files, oz
    - Re: Modelsim .asm files, James Unterburger
graphic representation of a vhdl project, marc
- Re: graphic representation of a vhdl project, Mike Treseler
  - Re: graphic representation of a vhdl project, marc
    - Re: graphic representation of a vhdl project, Mike Treseler
    - Re: graphic representation of a vhdl project, marc
spam, TehPron
- <Possible follow-ups>
- spam, TehPron
- SPAM, sandeep
- spam, d_s_klein
- spam, d_s_klein
Re: Real port types in VHDL, Jonathan Bromley
- Re: Real port types in VHDL, Alan Fitch
state machine reset, yiipee
- Re: state machine reset, Jeff Cunningham
  - Re: state machine reset, yiipee
    - Re: state machine reset, yiipee
    - Re: state machine reset, sandeep
- Re: state machine reset, rickman
  - Re: state machine reset, Svenn Are Bjerkem
    - Re: state machine reset, Mike Treseler
    - Re: state machine reset, jacko
    - Re: state machine reset, rickman
    - Re: state machine reset, Mike Treseler
    - Re: state machine reset, jacko
    - Re: state machine reset, jacko
    - Re: state machine reset, kennheinrich
    - Re: state machine reset, Jonathan Bromley
    - Re: state machine reset, rickman
    - Re: state machine reset, jacko
    - Re: state machine reset, Jonathan Bromley
    - Re: state machine reset, Mike Treseler
    - Re: state machine reset -- typo, Mike Treseler
    - Re: state machine reset, rickman
    - Re: state machine reset, Mike Treseler
    - Message not available
    - Re: state machine reset, Mike Treseler
    - Re: state machine reset, Jonathan Bromley
    - Re: state machine reset, Andy
    - Re: state machine reset, rickman
    - Re: state machine reset, Jonathan Bromley
    - Re: state machine reset, kennheinrich
    - Re: state machine reset, Mike Treseler
    - Re: state machine reset, KJ
    - Re: state machine reset, rickman
  - Re: state machine reset, Wolfgang Grafen
    - Re: state machine reset, KJ
    - Re: state machine reset, Mike Treseler
    - Re: state machine reset, casey
    - Re: state machine reset, Mike Treseler
    - Re: state machine reset, Wolfgang Grafen
    - Re: state machine reset, KJ
    - Re: state machine reset, Wolfgang Grafen
    - Re: state machine reset, Andy
    - Re: state machine reset, Wolfgang Grafen
    - Re: state machine reset, rickman
    - Re: state machine reset, Wolfgang Grafen
    - Re: state machine reset, rickman
    - Re: state machine reset, Wolfgang Grafen
    - Re: state machine reset, rickman
    - Re: state machine reset, Wolfgang Grafen
    - Re: state machine reset, rickman
    - Re: state machine reset, jacko
    - Re: state machine reset, Wolfgang Grafen
    - Re: state machine reset, rickman
    - Re: state machine reset, Wolfgang Grafen
- Re: state machine reset, lings . 23
Re: Active HDL simulator, Mike Treseler
Modeslsim VHDL library distribution, Rob
- Re: Modeslsim VHDL library distribution, Kim Enkovaara
signals in sensitiv list... and reset, Rick North
- Re: signals in sensitiv list... and reset, KJ
  - Re: signals in sensitiv list... and reset, Andy
    - Re: signals in sensitiv list... and reset, rickman
    - Re: signals in sensitiv list... and reset, Andy
- Re: signals in sensitiv list... and reset, jacko
  - Re: signals in sensitiv list... and reset, KJ
    - Re: signals in sensitiv list... and reset, jacko
    - Re: signals in sensitiv list... and reset, KJ
    - Re: signals in sensitiv list... and reset, jacko
    - Re: signals in sensitiv list... and reset, Brian Drummond
    - Re: signals in sensitiv list... and reset, kennheinrich
    - Re: signals in sensitiv list... and reset, jacko
    - Re: signals in sensitiv list... and reset, kennheinrich
    - Re: signals in sensitiv list... and reset, jacko
    - Re: signals in sensitiv list... and reset, rickman
    - Re: signals in sensitiv list... and reset, jacko
    - Re: signals in sensitiv list... and reset, KJ
    - Re: signals in sensitiv list... and reset, jacko
    - Re: signals in sensitiv list... and reset, jacko
    - Re: signals in sensitiv list... and reset, rickman
    - Re: signals in sensitiv list... and reset, jacko
    - Re: signals in sensitiv list... and reset, rickman
    - Re: signals in sensitiv list... and reset, jacko
    - Re: signals in sensitiv list... and reset, rickman
    - Re: signals in sensitiv list... and reset, jacko
    - Re: signals in sensitiv list... and reset, KJ
    - Re: signals in sensitiv list... and reset, jacko
    - Re: signals in sensitiv list... and reset, KJ
    - Re: signals in sensitiv list... and reset, jacko
    - Re: signals in sensitiv list... and reset, KJ
    - Re: signals in sensitiv list... and reset, jacko
    - Re: signals in sensitiv list... and reset, KJ
    - Re: signals in sensitiv list... and reset, Mike Treseler
When are concurrent assignments updated?, Svenn Are Bjerkem
- Re: When are concurrent assignments updated?, Alan Fitch
  - Re: When are concurrent assignments updated?, Svenn Are Bjerkem
    - Re: When are concurrent assignments updated?, Brian Drummond
    - Re: When are concurrent assignments updated?, Alan Fitch
    - Re: When are concurrent assignments updated?, Brian Drummond
    - Re: When are concurrent assignments updated?, Svenn Are Bjerkem
    - Re: When are concurrent assignments updated?, Alan Fitch
    - Re: When are concurrent assignments updated?, Alan Fitch
    - Re: When are concurrent assignments updated?, Svenn Are Bjerkem
Use package with selected function, Flo
- Re: Use package with selected function, Tricky
  - Re: Use package with selected function, Flo
Can someone try my code on other architectures/families ?, whygee
- Re: Can someone try my code on other architectures/families ?, Mike Treseler
  - Re: Can someone try my code on other architectures/families ?, whygee
    - Re: Can someone try my code on other architectures/families ?, Mike Treseler
    - Re: Can someone try my code on other architectures/families ?, whygee
    - Re: Can someone try my code on other architectures/families ?, Mike Treseler
    - Re: Can someone try my code on other architectures/families ?, whygee
- Re: Can someone try my code on other architectures/families ?, Symon
  - Re: Can someone try my code on other architectures/families ?, whygee
Quartus II infered latches, jacko
- Re: Quartus II infered latches, KJ
  - Re: Quartus II infered latches, jacko
    - Re: Quartus II infered latches, KJ
    - Re: Quartus II infered latches, KJ
    - Re: Quartus II infered latches, jacko
    - Re: Quartus II infered latches, KJ
    - Re: Quartus II infered latches, jacko
    - Re: Quartus II infered latches, Mike Treseler
    - Re: Quartus II infered latches, jacko
    - Re: Quartus II infered latches, KJ
    - Re: Quartus II infered latches, jacko
    - Re: Quartus II infered latches, Mike Treseler
    - Re: Quartus II infered latches, jacko
- Re: Quartus II infered latches, rickman
  - Re: Quartus II infered latches, jacko
    - Re: Quartus II infered latches, rickman
    - Re: Quartus II infered latches, KJ
    - Re: Quartus II infered latches, jacko
    - Re: Quartus II infered latches, KJ
    - Re: Quartus II infered latches, Mike Treseler
    - Re: Quartus II infered latches, rickman
    - Re: Quartus II infered latches, Andy
    - Re: Quartus II infered latches, jacko
    - Re: Quartus II infered latches, Mike Treseler
    - Re: Quartus II infered latches, jacko
    - Re: Quartus II infered latches, Mike Treseler
    - Re: Quartus II infered latches, jacko
    - Re: Quartus II infered latches, jacko
    - Re: Quartus II infered latches, jacko
- Re: Quartus II infered latches, Symon
- <Possible follow-ups>
- Re: Quartus II infered latches, rickman
attributes in VHDL, shweta
- Re: attributes in VHDL, TigerJade
  - Re: attributes in VHDL, Jonathan Bromley
    - Re: attributes in VHDL, Tricky
    - Re: attributes in VHDL, kennheinrich
Nibz processor @ 472 LEs (16 bit generic specified), jacko
- Re: Nibz processor @ 472 LEs (16 bit generic specified), jacko
  - Re: Nibz processor @ 472 LEs (16 bit generic specified), Mike Treseler
    - Re: Nibz processor @ 472 LEs (16 bit generic specified), jacko
    - Re: Nibz processor @ 472 LEs (16 bit generic specified), Mike Treseler
    - Re: Nibz processor @ 472 LEs (16 bit generic specified), KJ
    - Re: Nibz processor @ 472 LEs (16 bit generic specified), Symon
    - Re: Nibz processor @ 472 LEs (16 bit generic specified), KJ
    - Re: Nibz processor @ 472 LEs (16 bit generic specified), jacko
    - Re: Nibz processor @ 472 LEs (16 bit generic specified), jacko
    - Re: Nibz processor @ 472 LEs (16 bit generic specified), KJ
I like this access type example, James Unterburger
Another pointer question, Tricky
- Re: Another pointer question, Brian Drummond
Memory Leaks with pointers, Tricky
- Re: Memory Leaks with pointers, Jonathan Bromley
Odd error in code, rickman
- Re: Odd error in code, Mike Treseler
  - Re: Odd error in code, rickman
- Re: Odd error in code, Tricky
  - Re: Odd error in code, rickman
    - Re: Odd error in code, Mike Treseler
System verilog, strider
- Re: System verilog, Mike Treseler
Disconnect instantiation during Simulation, Shanmugavel D
- Re: Disconnect instantiation during Simulation, Andy
Problem with additions and std_logic, XSterna
- Re: Problem with additions and std_logic, rickman
- Re: Problem with additions and std_logic, KJ
- Re: Problem with additions and std_logic, Symon
  - Re: Problem with additions and std_logic, XSterna
    - Re: Problem with additions and std_logic, KJ
    - Re: Problem with additions and std_logic, Andy
    - Re: Problem with additions and std_logic, KJ
    - Re: Problem with additions and std_logic, XSterna
    - Re: Problem with additions and std_logic, Mike Treseler
    - Re: Problem with additions and std_logic, KJ
    - Re: Problem with additions and std_logic, XSterna
    - Re: Problem with additions and std_logic, rickman
    - Re: Problem with additions and std_logic, Tricky
    - Re: Problem with additions and std_logic, XSterna
    - Re: Problem with additions and std_logic, rickman
    - Re: Problem with additions and std_logic, Symon
    - Re: Problem with additions and std_logic, Andy
    - Re: Problem with additions and std_logic, Mike Treseler
    - Re: Problem with additions and std_logic, Marty Ryba
    - Re: Problem with additions and std_logic, rickman
    - Re: Problem with additions and std_logic, rickman
Simulation works, Programmed FPGA does not, utauta
- Re: Simulation works, Programmed FPGA does not, Mike Treseler
  - Re: Simulation works, Programmed FPGA does not, kenm
  - Re: Simulation works, Programmed FPGA does not, Brian Drummond
  - Re: Simulation works, Programmed FPGA does not, Nicolas Matringe
  - Re: Simulation works, Programmed FPGA does not, Andy
  - Re: Simulation works, Programmed FPGA does not, Peter
    - Re: Simulation works, Programmed FPGA does not, rickman
Re: pragma in ModelSim, chestnut
- Re: pragma in ModelSim, Brian Drummond
- <Possible follow-ups>
- Re: pragma in ModelSim, Peter
  - Re: pragma in ModelSim, Amal
Estimate logic cells of new processor?, jacko
Re: problem with the clock and ise, Timo Moesgen
- Re: problem with the clock and ise, Brian Drummond
Re: Modeling an external ram VHDL design, Brian Drummond
- <Possible follow-ups>
- Re: Modeling an external ram VHDL design, Jonathan Bromley
  - Re: Modeling an external ram VHDL design, Mike Treseler
    - Re: Modeling an external ram VHDL design, Jonathan Bromley
    - Re: Modeling an external ram VHDL design, Mike Treseler
Re: race conditions in huge project, jens
Re: How to understand this code in a package definition, Andy Peters
- Re: How to understand this code in a package definition, Brian Drummond
  - Re: How to understand this code in a package definition, KJ
    - Re: How to understand this code in a package definition, Amal
Generates and "multiple sources", Andy Peters
- Re: Generates and "multiple sources", Kevin Neilson
  - Re: Generates and "multiple sources", Mark McDougall
- Re: Generates and "multiple sources", Tricky
- Re: Generates and "multiple sources", KJ
  - Re: Generates and "multiple sources", Andy Peters