Re: multiply/divide algorithm

"skyworld" <chenyong20000@xxxxxxxxx> wrote in message
news:1125465038.773039.135260@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
> that is: is there any algorithm which i could use to implement multiply
> and divide by verilog?

Bottom line: yes there are algorithms to do multiply and divide.
Where are these algorithms found? Here and there - all over but hard to
find.
Multiplies and divides are typically optimized to the target hardware where
ASICs have precompiled libraries and FPGAs have dedicated silicon to handle
fixed-point multiplies. Division takes longer than mults because it's
typically performed in a similar manner to how we do long division.
Floating point is typically a standards-related endeavor and less useful in
systems with dedicated functionality (dealing with numbers in a restricted
range) as opposed to generic needs like those in a processor.

If you want floating point multiplies and divides, you'll probably need to
find existing IP that costs money or is (at best) slightly supported in such
places as www.opencores.org. The functionality might seem basic enough that
everyone should have something in their tool box. The reality is the
optimized silicon and libraries keeps us from doing our own algorithms
unless we absolutely have to. Most hardware folks stay away from floating
point, using fixed-point representations instead.

If you want to do simulation and synthesis for both ASICs and FPGAs,
consider using code optimized for the ASIC and code optimized for the FPGA
and verify the two modules/algorithms produce the same results.

I'm sorry that responses to your post weren't all attempting to be helpful
responses. Consider asking a question that can be answered well in the
first place and you may get better responses.


.

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