Re: GA4 4-computer Chip .. most advanced ??

On Jul 2, 7:13 am, Wayne <news_putmynamehere...@xxxxxxxxxxxxxxx>
wrote:
On Wed, 01 Jul 2009 12:14:39 +1000, Jeff Fox <f...@xxxxxxxxxxxxxxxxxxx>
wrote:

On Jun 25, 5:36 am, jmdrake <johnmdr...@xxxxxxxxx> wrote:
Because "less advanced" (older) designs would read garbage
from a port with a pin wake-up a data read was required.

So, the latest intellasys series does not include this (sorry, it is
sometimes hard to tell)?

With earlier chips

'iocs b! \ point b to the iocs reg
'---u a! \ point a to a missing up neighbor

@a drop \ wake up from pin transition
@b \ read iocs to get pin status

Because reading a missing neighbor to access the pin
wake-up circuit in place of neighbor handshake logic
it had to read as data and the garbage from no neighbor
discarded. Then the pin status could be read after
the processor woke up.

After getting the pin and neighbor status you could
then decide whether you were suppose to deal with
pin events or an incoming code stream from a neighbor.

You could not

--l- \ call the left port

because calling the left port would read that
garbage into the instruction register if there
as no up neighbor and only handshake logic from
the pin. The handshake that normally wakes up
a processor to read the port is there but there
is no neighbor writing data, just a pin providing
wake-up handshake. You could read it as data
and discard it but could not read it with the
program counter, ie. execute it.

On GA4 the design feeds data from what would be
the missing neighbor, a literal, opcode "@b ;"

So you can read that port with the program counter
and it will execute "@b ;" and read pin status not
garbage (if the B register is pointing to IOCS)

Previously you had to do

@a drop @b .... if deal-with-pin else execute-ports then

Now you can put a "rdl-" into your code and this single
statement will do something similar to the line above.
It will execute a complete stream sent the right or
down ports and will also wake up and read IOCS after
a pin transition.

It also required using both the A and B addressing
registers. Executing the port is addressing with the
program counter which also frees up the A register for
other uses.

There are other implications of being able to execute
ports linking to external neighbors. It is not just
a case of replacing a line of code with a single
statement. It also simplifies a lot of stream code.
Conditional branching inside of a stream is
problematic. Being able to replace instruction
sequences with conditional branches with single
statements has additional advantages for stream
execution. Treating off-chip neighbors more
like on-chip neighbors is useful and simplifies
software.

The twenty year history of the project is one of
replacing a page or paragraph of code with a line
of code after tuning the architecture and instruction
set to make that possible. Do that a hundred times
and some of those lines of code become a single
opcode and some became zero code. This is one
more example, that's all.

With changes to have wider voltage range, more
linear analog circuits, less current leakage,
port and instruction set changes to make for
smaller and faster code the latest design is
the 'most advanced' yet.

Sounds familiar from the time of the mup20 (still can't figure out where I
put that chip, or if I gave it away).

Most P21 documentation came from its owner, Dr. Ting and his Offette
Enterprises with a little coming from UltraTechnology. IntellaSys had
more people working on documentation. Green Arrays has had Chuck
writing very dense documentation on his colorforth.com site and
appear to have a different model than IntellaSys. If they do the
programming then there is not the same need to provide detailed
documentation on how to do the programming to the outside world.
We will see if they get big enough to open up to the outside
the way IntellaSys did.

Best Wishes
.

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