Re: 4p-1.5-wip with just in time compilation

Op Thu, 30 Aug 2007 19:14:51 +0200 schreef Marcel Hendrix:

Coos Haak <chforth@xxxxxxxxx> wrote Re: 4p-1.5-wip with just in time compilation
[..]
I thinks the Pentium XCHG instructions are not so slow as for the older
processors, XCHG EAX,r32 takes two, XCHG r32,r/m32 takes three.
Perhaps the assertion of the LOCK signal and the fact the instruction can't
be paired with others result in a little decrease in speed in some
applications.

The details are in this thread:
Subject: Re: Exchange
Newsgroups: comp.lang.forth
Message-ID: <83303314163560@xxxxxxxxxxxxxx>
References: <2007Jul9.195923@xxxxxxxxxxxxxxxxxxxxxxxxxx>

You're hosed with the current Intel chips, AMD fixed it.

I remember the posting.
Would that mean that my pityful 16 bit CHForth on this AMD Athlon(TM) XP
2000+ would run faster when I used
XCHG BP,SP PUSH BX XCHG BP,SP POP BX
instead of
LEA BP,-2[BP] MOV [BP],BX POP BX
to do >R etc.? Shorter code altogether.

--
Coos

CHForth, 16 bit DOS applications
http://home.hccnet.nl/j.j.haak/forth.html
.

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