Re: Structured Programming using Forth

On Apr 7, 5:33 am, John Passaniti <put-my-first-name-
h...@xxxxxxxxxxxxxxxxx> wrote:
foxchip wrote:
Absolutely. Errors accumulate in the lower bits of calculations and
so intermediate calculations may need a lot more than 24 bits and
this is only an 18-bit processor, although a 36-bit multiply step
will
be available in the instruction set. Since it takes multiple steps
and isn't a single cycle MAC multiple nodes will be needed to match
the speed of some DSP chips. But nodes are small and cheap and as
long as you end up with a significantly lower cost or power
consumption
for the calculation that needs to be done you have a win. So we
have compared the performance on these things to other solutions.

That's the part I have a hard time getting a sense of. Yeah, I realized
I could use multiple nodes to get higher performance and/or to do the
kinds of SIMD instructions some DSPs offer. But there isn't an infinite
number of nodes, and what I have a problem seeing is how many nodes
would be used in such an application-- and thus, how many would be free
for other functions.

Again, I'm not expecting the SEAforth to necessarily be able to replace
a DSP. And that's because DSPs aren't just about MACs, but often also
about I/O. It isn't unusual for us to have systems with 32 channels of
pro-quality digital audio flowing in and out. So for those applications
we're also targeting DSPs (or synthesizing in FPGAs) appropriate I/O.

RF DSP needs to be considerably faster than audio processing but
has lower bit resolution requirements.

We're currently not very interested in RF applications other than for
simple control applications. Right now, we would probably just add on a
Bluetooth or ZigBee or Z-Wave or even 802.11 module. But if the final
system cost of a SEAforth chip was low enough, we might look at that.

We're not RF experts and we don't relish getting FCC approval for
something we whipped up ourselves. Which is why we (like a lot of
companies) would look at the various modules that are available. In
order to be competitive, Intellasys would need to make software-radio
code not only available, but also have gotten the whatever FCC approvals
are needed.

John, the possibilities are daunting; neuro scientists have been have
been having a crack at it for a long long time and still haven't fully
figured it out. I seriously doubt that you magically will in the
glimpse of an eye (but maybe you will ;-)).

The new SEAForth processor architecture is closer to a usable
artificial neural network than anything else ever created before, but
they are attacking a different angle (artificial neural networks have
been created many times before with varying results, but the angle
taken is quite different this time). This network is coming from the
angle of the hardware + software world whereas traditional artificial
neural networks are only mostly attacking the hardware angle modeled
after the brain. The results obtained with the latter approach have
been more or so successful to varying degrees. This new approach has
the full benefit of allowing us to program what we want the network to
represent while also allowing us to have a full understanding of what
the network is representing instead of having trying (trying is the
right term I would say) to train the network properly while guessing
what it can do.

Yes, alot of code will have to be rethough, rewritten and optimized,
but eventually, higher level constructs will become available, and at
some point, the architecture becomes somewhat less relevant, it just
works and does what needs to be done at a more abstract level. You
won't be getting much of what the brain does if you look at a single
neuron, you can analyse the neuron all you want and gauge its
limitations, in the end, the network somehow achieves it.

An important idea and result of using such an architecture is that
even if a node gets damaged, it won't prevent software from still
rolling strong forever more; even with a badly damaged network,
software would still be able to run. This is a consequence of a
networked architecture. This seems to be a very interresting property
for hardware to have in general (I'm thinking space exploration). Not
only is the chip/chips inexpensive, but it has this interresting
property. I see from your many posts that you have a very pragmatic
mind, but the long term benefits of such an architecture, even if not
immediately obvious to the pragmatic mind will reap tremendous
benefits. If the Intellasys train is too far ahead for it's time, it
might fail, it depends how well they go about marketing their product,
but inevitably, at a later point in time, the ideas explored here will
be picked up again and explored further. It's just a question of time
really. This type architecture and its usefulness are there to stay.

Nature for one decided it was very useful ;-). What we decide to do
with this architectural pearl is up to us.

Regards
Jean-Francois Michaud

.

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