Re: Ayn (PD?) work for FORTH on PIC 24... processors?
- From: Mikael Nordman <oh2aun.abc@xxxxxxxxxxxxxxx>
- Date: Fri, 16 Mar 2007 12:13:07 +0200
nnc@xxxxxxxxxxxxxxx wrote:
Does anyone work on/have heard about any work (preferably public
domain, open source or eq.) on making an implementation running
(natively?) in a PIC 24... CPU?
In checking the resources and the programming model, it looks to mee
as if these 16-bits processors indeed should be capable of running a
native, "full function" FORTH system, please argue or correct me if
Yuou think I'm wrong...
The model of 8 MBytes of "program code" and 64 kBytes of "data area"
makes things slightly interesting, I guess. But there is a method of
mapping pages of the program memory to apear as data memory...
It feels interesting to have base system in flash memory, and a method
of doing development in RAM, but when the developed code and
structures work fine, they are to be moved to Flash. (And possible to
overwrite later if further changes becomes necessary.)
I have developed FlashForth for PIC18Fxxxx which works as a
standalone Forth system.
FlashForth compiles directly into program ROM since machine code
cannot be executed from RAM. FlashForth is an STC Forth.
If ITC would be used then forth code could be executed from RAM also.
The basic dictionary of FF is in a protected code block, so
FF cannot be destroyed by doing some crazy stuff. Just reset
and write INIT on the console and you have a clean slate again.
FlashForth could be easily ported to PIC24 if you keep to a 16 bit
cell size, in that case you can address 56 Kbyte of program memory
4 kbyte of eeprom and 4 kbyte of ram. Eeprom is mapped to h'exxx and
ram to h'fxxx in @ ! C@ C! .
If a 24 bit cell size would be used then larger programs could be used.
I feel that the 64 kbyte address space is enough for most PIC applications. Also most of the devices dont have more memory.
--
Mikael
FlashForth: http://www.kolumbus.fi/oh2aun
.
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