Re: ICFP Contest
- From: mhx@xxxxxx (Marcel Hendrix)
- Date: Tue, 25 Jul 2006 00:25:15 GMT
This the BALANCE machine puzzle concocted by Y. Yang (ICFP 2006 contest).
I got interested too late (in balance), and the simulator didn't work
quite right. It was good enough to get me some extra points, though.
Had it worked, I might have extended it to automatically search for
solutions to all puzzles. Now I just used it to test my intuitive
approaches.
I "solved" the stop puzzle with code 6100 (my original simulator
suggested that was OK). However, I now think this was incorrectly
approved by the UMIX test program.
Maybe somebody here can find a bug in my current simulator, or find
a shorter program for STOP ...
Note that I use ROLL in PHYSICS, can that be avoided?
-marcel
-- ----
(*
* LANGUAGE : ANS Forth with extensions
* PROJECT : Forth Environments
* DESCRIPTION : ICFP contest; the game designed by user Yang
* CATEGORY : simulators
* AUTHOR : Marcel Hendrix
* LAST CHANGE : July 24, 2006, Marcel Hendrix
*)
NEEDS -miscutil
REVISION -balance "ÄÄÄ BALANCE game Version 1.01 ÄÄÄ"
PRIVATES
DOC
(*
,-'~~~'-,
.~ `. ~.
/ 8 | \
: ,' :
| .--~ |
! ; !
\ | 8 /
`. ', .'
`-.___.-`
B A L A N C E
User's Manual
I. Introduction
Night and day. Beauty and truth. Oxygen and phlogiston. Everywhere we
look there are perfect opposites. Balance is a programming language
based on the concept of harmoniously coexisting duals. In this
language, every operation has an equal and opposite reaction. This
ensures that the machine state does not stray from equilibrium.
Because it performs two operations for each instruction, the language
is also twice as fast as single-operation languages.
Balance programs are run inside an 8-bit machine with the following
features:
* CODE: an arbitrarily long immutable stream of bytes
* M[0..255]: 256 8-bit bytes of memory
* IP: the instruction pointer (an arbitrary non-negative value)
* IS: the instruction speed (ranging from -16 to +15)
* sR[0..3]: four 8-bit source registers
* dR[0..1]: two 8-bit destination registers
* four instructions
Each instruction is specified by a single 8-bit byte. The bits
are numbered from most to least meaningful as follows:
lmb
.--------.
|76543210|
`--------'
mmb
* The bits 7,6,5 specify the opcode
and depending on the instruction:
* bits 4,3,2,1,0 specify an immediate value IMM
or
* bit 4 denotes a destination register D
* bits 3,2 denote the first source register S1
* bits 1,0 denote the second source register S2
Every problem in computer science can be solved by an additional layer
of indirection. Balance thus provides this facility automatically:
Each of the source and destination registers is an indirect register.
For instance, most instructions do not work on the contents of
registers S1 and S2 directly, but use the contents of S1 and S2 as
indices into the memory M. The result is not stored in D, but rather
stored in the memory location indicated by the current contents of D.
The machine begins with IP = 0 and IS = 1. At each step of the
machine, an instruction is fetched from CODE[IP] (where CODE[0] is the
first instruction, CODE[1] the second, etc.). The instruction is
executed, and then IP is increased (or decreased) by the value of IS,
modulo the length of CODE.
II. Instruction Reference
The four instructions of Balance are MATH, LOGIC, SCIENCE, and
PHYSICS. The following is their specification; some examples are
given in a separate section below.
Opcode (bits) Description
MATH 001
MATH performs addition and its dual, subtraction.
These act on different registers so that the math is
not undone. All operations are modular with respect
to the number of relevant bits. Source registers are
represented with two bits, so if S1 is 3, then
sR[S1+1] is sR[0]. Similarly, dR[1+1] is dR[0].
Quantities in memory are eight bits, so 250 + 20 is
14.
M[ dR[D+1] ] <- M[ sR[S1+1] ] - M[ sR[S2+1] ]
M[ dR[D] ] <- M[ sR[S1] ] + M[ sR[S2] ]
LOGIC 010
LOGIC performs bitwise 'and' as well as its perfect
dual, bitwise 'exclusive or.'
M[ dR[D+1] ] <- M[ sR[S1+1] ] XOR M[ sR[S2+1] ]
M[ dR[D] ] <- M[ sR[S1] ] AND M[ sR[S2] ]
SCIENCE 000
SCIENCE tests a hypothesis and determines the speed
at which the program progresses. When executed, it
sets the instruction speed IS to immediate value IMM,
as long as the memory cell indicated by sR[0] does
not contain 0. Because this instruction behaves
specially when the memory cell contains 0, it also
behaves specially if IS is set to zero: the machine
then halts. The value IMM is treated as a signed
five-bit number in two's complement form, so it can
take on values from -16 to +15.
if M[ sR[0] ] = 0 then (nothing)
otherwise IS <- IMM
if IS = 0 then HALT
else (nothing)
PHYSICS 011
PHYSICS changes what the registers reference, in both
a linear and angular way. The immediate value IMM,
treated as a signed five-bit number, is added to the
register sR[0] so that it may reference a different
memory cell. The instruction also rotates the values
between some subset of the registers, according to a
bitmask derived from IMM. The source register sR[0]
is always part of the rotated set, so the bitmask
used is a 6 bit number where the lowest 5 bits are
the same as IMM and the sixth bit is always 1.
sR[0] <- sR[0] + (IMM as signed 5-bit number)
let L=L0,...,L4 be the registers
dR[1], dR[0], sR[3], sR[2], sR[1]
then let C be the list of n elements Li
such that bit i is set in IMM
(bit 0 is the least significant,
bit 4 is the most significant)
then let Cs be the list (sR[0], C0, ..., C(n-1))
and let Cd be the list (C0, ..., C(n-1), sR[0])
then, simultaneously
Cd0 <- Cs0
...
Cdn <- Csn
Any other opcode stands for the instruction BAIL, which will cause the
machine to terminate in failure. Programmers sometimes insert such
bugs deliberately in order to quickly halt the interpreter during
testing.
III. Examples
If M[sR[0]] = 0, IP = 3, IS = 6, length(CODE) = 100,
and CODE[IP] = SCIENCE 12,
then in the next cycle IP = 9 and IS = 6.
If M[sR[0]] = 9, IP = 3, IS = 6, length(CODE) = 100,
and CODE[IP] = SCIENCE 12,
then in the next cycle IP = 15 and IS = 12.
If sR = {0, 1, 2, 3}, dR = {4, 5}, M = {2, 3, 5, 7, 11, 13, 17, ...},
and CODE[IP] = MATH (0, 3, 1)
then in the next cycle M = {2, 3, 5, 7, 10, 253, 17, ...}.
If sR = {0, 1, 2, 3}, dR = {4, 5}, M = {2, 3, 5, 7, 11, 13, 17, ...},
and CODE[IP] = LOGIC (0, 3, 1)
then in the next cycle M = {2, 3, 5, 7, 3, 7, 17, ...}.
If sR = {0, 1, 2, 3}, dR = {4, 5}
and CODE[IP] = PHYSICS -1
then sR[0] is updated with sR[0] + -1 = 255
and in the next cycle sR = {1, 2, 3, 4}, dR = {5, 255}.
If sR = {0, 1, 2, 3}, dR = {4, 5}
and CODE[IP] = PHYSICS -16
Then sR[0] is updated with sR[0] + (-16) = -16.
The bitmask for rotation is 1 1 0 0 0 0
for the register set {-16, 1, 2, 3} {4, 5},
so in the next cycle sR = {1, -16, 2, 3}, dR = {4, 5}.
If sR = {0, 1, 2, 3}, dR = {4, 5}
and CODE[IP] = PHYSICS 15
then sR[0] is updated with sR[0] + 15 = 15.
The bitmask for rotation is 1 0 1 1 1 1
for the register set {15, 1, 2, 3} {4, 5}
so in the next cycle sR = {2, 1, 3, 4}, dR = {5, 15}.
IV. Syntax
The Balance language concrete syntax is simply a single line of bytes,
each written as two hexadecimal digits, with no whitespace or other
characters.
V. Balance Certified Professional Program (BCPP)
As a professional programmer, you are invited to join one of the
industry's leading programmer certification programs. BCPP
certification can be obtained automatically by solving a series of
challenge problems and verifying the results using the supplied
program "certify".
Please see the file PUZZLES for the list of challenge problems. To
certify a solution, stored in a file called "solve.bal", to the
problem called "prop", run the command
certify prop solve.bal
Because a professional programmer knows that shorter code is better
code, your certified skill level depends on the length of the program
that you submit to the certifier.
A challenge problem consists of a description of the initial register
and memory values and the desired final configuration. A program
solves the challenge if it achieves the final configuration and halts
gracefully (SCIENCE 0 with M[sR[0]] <> 0).
Accepted applicants will receive an engraved sandstone diploma and
will be added to the 19101 electronic edition of "Who's Who in
Computerology." Please allow 4-6 weeks for delivery.
*)
ENDDOC
CREATE CODE PRIVATE #1024 CHARS ALLOT -- code memory
CREATE M PRIVATE #256 CHARS ALLOT -- data memory
0 VALUE IP PRIVATE -- instruction pointer
0 VALUE IS PRIVATE -- instruction speed / jump size
CREATE sR PRIVATE 4 CHARS ALLOT -- source registers 8 bit
CREATE dR PRIVATE 2 CHARS ALLOT -- destination registers 8 bit
0 VALUE opcode PRIVATE -- decoded opcode
0 VALUE ?immed PRIVATE -- decoded immediate value (possibly)
0 VALUE D PRIVATE -- destination register
0 VALUE S1 PRIVATE -- source register S1
0 VALUE S2 PRIVATE -- source register S2
0 VALUE status PRIVATE -- signifies HALT/ILLEGAL
1 CONSTANT =HALT PRIVATE
2 CONSTANT =ILLEGAL PRIVATE
%000 CONSTANT =SCIENCE PRIVATE
%010 CONSTANT =LOGIC PRIVATE
%001 CONSTANT =MATH PRIVATE
%011 CONSTANT =PHYSICS PRIVATE
VARIABLE debug? debug? ON
: BITSET ( u index -- flag ) 2^x TUCK AND = ; PRIVATE
: >signed ( u -- n ) DUP #15 > IF #32 - ENDIF ; PRIVATE
: .DISASSEMBLE ( -- )
CASE opcode
=SCIENCE OF ." SCIENCE M[sR[0]], " ?immed DEC. ENDOF
=LOGIC OF ." LOGIC M[dR[" D 0 .R ." +1]] <- M[sR[" S1 0 .R ." +1]] XOR M[sR[" S2 0 .R ." +1]] | M[dR[" D 0 .R ." ]] <- M[sR[" S1 0 .R ." ]] AND M[sR[" S2 0 .R ." ]]" ENDOF
=MATH OF ." MATH M[dR[" D 0 .R ." +1]] <- M[sR[" S1 0 .R ." +1]] - M[sR[" S2 0 .R ." +1]] | M[dR[" D 0 .R ." ]] <- M[sR[" S1 0 .R ." ]] + M[sR[" S2 0 .R ." ]]" ENDOF
=PHYSICS OF ." PHYSICS " ?immed DEC. ENDOF
." BAIL " opcode DEC. ?immed DEC.
ENDCASE ;
: .MACHINE ( -- )
CR ." IP = " IP H. 2 SPACES .DISASSEMBLE
CR ." M = " 0 H. ." {" 8 0 DO M I + C@ 0DEC.R ." , " LOOP ." ...}"
CR ." IS = " IS 0DEC.R ." , status = " status DEC.
CR ." sR = {" sR C@+ 0DEC.R ." , " C@+ 0DEC.R ." , " C@+ 0DEC.R ." , " C@ 0DEC.R ." }"
CR ." dR = {" dR C@+ 0DEC.R ." , " C@ 0DEC.R ." }" ; PRIVATE
: MACHINE-INIT ( -- )
CLEAR IP 1 TO IS CLEAR status
sR 4 ERASE dR 2 ERASE
CODE #1024 ERASE
M #256 ERASE ; PRIVATE
MACHINE-INIT
: cdecode ( byte -- )
DUP 5 RSHIFT TO opcode
DUP $1F AND >signed TO ?immed
DUP %10000 AND 4 RSHIFT TO D
DUP %01100 AND 2 RSHIFT TO S1
%00011 AND TO S2 ; PRIVATE
: (ADDR1) ( xt -- )
( source1 ) S1 1+ %11 AND sR + C@ $FF AND M + C@
( source2 ) S2 1+ %11 AND sR + C@ $FF AND M + C@
ROT EXECUTE
( destination ) D 1+ %11 AND dR + C@ $FF AND M + C! ; PRIVATE
: (ADDR0) ( xt -- )
( source1 ) S1 %11 AND sR + C@ $FF AND M + C@
( source2 ) S2 %11 AND sR + C@ $FF AND M + C@
ROT EXECUTE
( destination ) D %11 AND dR + C@ $FF AND M + C! ; PRIVATE
: MATH ( -- ) ['] - (ADDR1) ['] + (ADDR0) ; PRIVATE
: LOGIC ( -- ) ['] XOR (ADDR1) ['] AND (ADDR0) ; PRIVATE
: SCIENCE ( -- )
sR C@ M + C@ IF ?immed TO IS ENDIF
IS 0= IF =HALT TO status ENDIF ; PRIVATE
: PHYSICS ( -- )
?immed $1F AND %100000 OR LOCALS| bitmask |
sR C@ ?immed + sR C!
( fetch to stack )
bitmask 5 BITSET IF sR C@ ENDIF
bitmask 4 BITSET IF sR 1+ C@ ENDIF
bitmask 3 BITSET IF sR 2+ C@ ENDIF
bitmask 2 BITSET IF sR 3 + C@ ENDIF
bitmask 1 BITSET IF dR C@ ENDIF
bitmask 0 BITSET IF dR 1+ C@ ENDIF
bitmask #BITS 1- ROLL ( rotate )
( store back )
bitmask 0 BITSET IF dR 1+ C! ENDIF
bitmask 1 BITSET IF dR C! ENDIF
bitmask 2 BITSET IF sR 3 + C! ENDIF
bitmask 3 BITSET IF sR 2+ C! ENDIF
bitmask 4 BITSET IF sR 1+ C! ENDIF
bitmask 5 BITSET IF sR C! ENDIF ; PRIVATE
: cexecute ( -- )
CASE opcode
=SCIENCE OF SCIENCE ENDOF
=LOGIC OF LOGIC ENDOF
=MATH OF MATH ENDOF
=PHYSICS OF PHYSICS ENDOF
( BAIL ) =ILLEGAL TO status
ENDCASE ; PRIVATE
: STEP ( -- )
CODE IP + C@ \ IP is not restricted
cdecode
debug? IF .MACHINE ENDIF
cexecute
IS +TO IP ; PRIVATE \ IP is not restricted
: CONTINUE ( -- )
BEGIN STEP status UNTIL
CR ." status = " status DEC. ;
: RUN ( -- ) MACHINE-INIT CONTINUE ;
: IASSEMBLE ( opcode imm -- u ) $1F AND SWAP 5 LSHIFT OR ;
: ASSEMBLE ( opcode n1 n2 n3 -- u ) SWAP 2 LSHIFT OR SWAP 4 LSHIFT OR SWAP 5 LSHIFT OR ;
-- EXAMPLES
: EX1 MACHINE-INIT
0 sR C! \ sR[0] = 0
sR C@ M + C0! \ M[sR[0]] = 0
3 TO IP 6 TO IS
=SCIENCE #12 IASSEMBLE CODE IP + C!
STEP .MACHINE
CR ." ... then in the next cycle IP = 9 and IS = 6." ;
: EX2 MACHINE-INIT
0 sR C! \ sR[0] = 0
sR C@ M + 9 SWAP C! \ M[sR[0]] = 9
3 TO IP 6 TO IS
=SCIENCE #12 IASSEMBLE CODE IP + C!
STEP .MACHINE
CR ." ... then in the next cycle IP = 15 and IS = 12." ;
: EX3 MACHINE-INIT
0 sR C! 1 sR 1+ C! 2 sR 2+ C! 3 sR 3 + C! \ sR = 0 1 2 3
4 dR C! 5 dR 1+ C! \ dR = 4 5
#17 #13 #11 7 5 3 2 7 0 DO M I + C! LOOP \ M = {2, 3, 5, 7, 11, 13, 17, ...}
0 TO IP 1 TO IS
=MATH 0 3 1 ASSEMBLE CODE IP + C!
STEP .MACHINE
CR ." ... then in the next cycle M = {2, 3, 5, 7, 10, 253, 17, ...}." ;
: EX4 MACHINE-INIT
0 sR C! 1 sR 1+ C! 2 sR 2+ C! 3 sR 3 + C! \ sR = 0 1 2 3
4 dR C! 5 dR 1+ C! \ dR = 4 5
#17 #13 #11 7 5 3 2 7 0 DO M I + C! LOOP \ M = {2, 3, 5, 7, 11, 13, 17, ...}
0 TO IP 1 TO IS
=LOGIC 0 3 1 ASSEMBLE CODE IP + C!
STEP .MACHINE
CR ." ... then in the next cycle M = {2, 3, 5, 7, 3, 7, 17, ...}." ;
: EX5 MACHINE-INIT
0 sR C! 1 sR 1+ C! 2 sR 2+ C! 3 sR 3 + C! \ sR = 0 1 2 3
4 dR C! 5 dR 1+ C! \ dR = 4 5
0 TO IP 1 TO IS
=PHYSICS -1 IASSEMBLE CODE IP + C!
STEP .MACHINE
CR ." ... then sR[0] is updated with sR[0] + -1 = 255"
CR ." and in the next cycle sR = {1, 2, 3, 4}, dR = {5, 255}." ;
: EX6 MACHINE-INIT
0 sR C! 1 sR 1+ C! 2 sR 2+ C! 3 sR 3 + C! \ sR = 0 1 2 3
4 dR C! 5 dR 1+ C! \ dR = 4 5
0 TO IP 1 TO IS
=PHYSICS -16 IASSEMBLE CODE IP + C!
STEP .MACHINE
CR ." ... then sR[0] is updated with sR[0] + -16 = -16"
CR ." The bitmask for rotation is 1 1 0 0 0 0"
CR ." ... for the register set {-16, 1, 2, 3} {4, 5}, "
CR ." so in the next cycle sR = {1, -16, 2, 3}, dR = {4, 5}." ;
: EX7 MACHINE-INIT
0 sR C! 1 sR 1+ C! 2 sR 2+ C! 3 sR 3 + C! \ sR = 0 1 2 3
4 dR C! 5 dR 1+ C! \ dR = 4 5
0 TO IP 1 TO IS
=PHYSICS 15 IASSEMBLE CODE IP + C!
STEP .MACHINE
CR ." ... then sR[0] is updated with sR[0] + 15 = 15"
CR ." The bitmask for rotation is 1 0 1 1 1 1"
CR ." ... for the register set {15, 1, 2, 3} {4, 5}, "
CR ." so in the next cycle sR = {2, 1, 3, 4}, dR = {5, 15}." ;
-- PUZZLES
DOC
(*
Balance Certified Professional Program Puzzles
This file contains a list of puzzles. Solutions to these puzzles may count
towards your BCPP certification. Use the certify program to submit
your solutions. (Note: Not all maximum scores have been attained by the
BCPP organization.)
Puzzle: stop
Initial memory: M[0-5] = [0, 1, 0, 0, 0, 0]
Remainder of memory initialized from /etc/passwd
Initial registers: {0, 1, 2, 3} {4, 5}
Final memory: Any
Final registers: Any
Certification point value: 5 - 10
Puzzle: stop1
Initial memory: M[0-5] = [0, 1, 0, 0, 0, 0].
Remainder of memory initialized from /etc/passwd
Initial registers: {0, 0, 0, 0} {0, 0}
Final memory: Any
Final registers: Any
Certification point value: 5 - 10
Puzzle: stop127
Initial memory: All zeroes except for M[127] = 127
Initial registers: {0, 0, 0, 0} {0, 0}
Final memory: Any
Final registers: Any
Certification point value: 5 - 20
Puzzle: stop128
Initial memory: All zeroes except for M[128] = 128
Initial registers: {0, 0, 0, 0} {0, 0}
Final memory: Any
Final registers: Any
Certification point value: 5 - 15
Puzzle: copymem
Initial memory: M[0] = a, where a <> 0. M[1] = 1.
All other memory locations initialized to 0
Initial registers: {0, 0, 0, 0} {0, 0}
Final memory: Any
Final registers: At least one register should contain a
Certification point value: 60 - 200
Puzzle: copyreg
Initial memory: M[0-7] = [1, 2, 4, 8, 16, 32, 64, 128].
All other memory locations initialized to 0.
Initial registers: {a, 0, 1, 2} {3, 4} where a <> 0
Final memory: At least one memory location should contain a
Final registers: Any
Certification point value: 60 - 200
Puzzle: swapmem
Initial memory: M[0-7] = [1, 2, 4, 8, 16, 32, 64, 128].
All other memory locations initialized to 0.
Initial registers: {0, 1, 2, 3} {4, 5}
Final memory: There exist i and j such that 0 <= i < j <= 7 and
M[i] contains the original value of M[j] and M[j]
contains the original value of M[i]
Final registers: Any
Certification point value: 10 - 40
Puzzle: swapreg
Initial memory: All memory locations initialized to 1
Initial registers: {0, 1, 2, 3} {4, 5}
Final memory: Any
Final registers: Swap any two distinct registers. The value of the
other registers may be anything
Certification point value: 5 - 50
Puzzle: swapreg2
Initial memory: All memory locations initialized to 1
Initial registers: {a, b, c, d} {x, y} where a, b, c, d, x, y <> 0
Final memory: Any
Final registers: Swap any two distinct registers. The value of the
other registers may be anything
Certification point value: 10 - 50
Puzzle: addmem
Initial memory: M[0] = a, M[1] = b, where a, b <> 0
All other memory locations initialized to 0
Initial registers: {0, 1, 2, 3} {4, 5}
Final memory: M[2] = a + b
Final registers: Any
Certification point value: 5 - 40
Puzzle: addmem2
Initial memory: M[0] = a, M[1] = b, where a, b <> 0
All other memory locations initialized to 0
Initial registers: {0, 1, 2, 3} {4, 5}
Final memory: M[0] = a, M[1] = b, M[2] = a + b.
All other memory locations must be 0
Final registers: Any
Certification point value: 10 - 50
Puzzle: multmem
Initial memory: M[0] = a, M[1] = b, where a, b <> 0
All other memory locations initialized to 0
Initial registers: {0, 1, 2, 3} {4, 5}
Final memory: M[2] = a * b
Final registers: Any
Certification point value: 60 - 200
Puzzle: fillmem
Initial memory: M[0-2] = [a, i, j], where a <> 0, 8 <= i < j <= 255
All other memory locations are initialized to 0
Initial registers: {0, 1, 2, 3} {4, 5}
Final memory: Memory locations from 8 to (i-1) must contain 0
Memory locations from i to (j-1) must contain a
Memory locations from j to 255 must contain 0
(all ranges are inclusive)
Final registers: Any
Certification point value: 60 - 200
Puzzle: clearreg
Initial memory: For each i from 0 to 255, M[i] = i
Initial registers: {0, 1, 2, 3} {4, 5}
Final memory: Any
Final registers: All registers must be set to 0
Certification point value: 20 - 100
*)
ENDDOC
-- This solution worked in the contest, this simulator
-- thinks otherwise!
: PUZZ1 MACHINE-INIT \ stop
0 sR C! 1 sR 1+ C! 2 sR 2+ C! 3 sR 3 + C! \ sR = 0 1 2 3
4 dR C! 5 dR 1+ C! \ dR = 4 5
0 0 0 0 1 0 6 0 DO M I + C! LOOP \ M = {0, 1, 0, 0, 0, 0, 0, ...}
0 TO IP 1 TO IS
=PHYSICS 1 IASSEMBLE CODE IP + C! \ make sR[0]=1
=SCIENCE 0 IASSEMBLE CODE IP + 1+ C! \ .. so we address M[1] and stop
STEP STEP .MACHINE ;
: PUZZ2 MACHINE-INIT \ stop1
0 sR C! 0 sR 1+ C! 0 sR 2+ C! 0 sR 3 + C! \ sR = 0 0 0 0
0 dR C! 0 dR 1+ C! \ dR = 0 0
0 0 0 0 1 0 6 0 DO M I + C! LOOP \ M = {0, 1, 0, 0, 0, 0, 0, ...}
0 TO IP 1 TO IS
=PHYSICS 1 IASSEMBLE CODE IP + C!
=PHYSICS 1 IASSEMBLE CODE IP + 1+ C!
=SCIENCE 0 IASSEMBLE CODE IP + 2+ C!
STEP STEP STEP .MACHINE ;
: PUZZ3 MACHINE-INIT \ stop127
0 sR C! 0 sR 1+ C! 0 sR 2+ C! 0 sR 3 + C! \ sR = 0 0 0 0
0 dR C! 0 dR 1+ C! \ dR = 0 0
1 M 127 + C! \ M[127] = 1
0 TO IP 1 TO IS
=PHYSICS 1 IASSEMBLE CODE IP + C!
=PHYSICS 1 IASSEMBLE CODE IP + 1+ C!
=SCIENCE 0 IASSEMBLE CODE IP + 2+ C!
STEP STEP STEP .MACHINE ;
:ABOUT CR ." Try: PUZZ2 " ;
.ABOUT -balance CR
DEPRIVE
(* End of Source *)
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