Re: ti's EZ-DSP STARTER KIT FOR F2812 -> just the board



cs_posting@xxxxxxxxxxx wrote:

On May 29, 12:28 pm, Vladimir Vassilevsky

The professional amateurs use the eval boards to control hardware
instead of designing a board of their own. This is what they call
"system integration". It is not so fun when it comes to production.

That's true. I suppose there might be a market for a board with just
the CPU.

This is a dead end. Trying to make a sellable product as a pile of evaluation boards, reference designs and the googled opensource junk reflects the insufficient resources and the general lack of talent and experience.

We always have enough other stuff we need that we go ahead
and make one, though prototyping using the board from the previous
product is common...

Building a hardware is not much of a problem, compared to the other parts of the development.


Why do you need a 510 pod?

To take advantage of all the nice in-circuit jtag-based debug
capability TI built into the chip? Because that's the easiest way to
program the on chip flash during development?

For F28xx, the easiest way to program the flash is by the RS232 bootloader. BTW, for some reason the flash programming is amazingly slow on those chips.

Sure, you can get code into them other ways. And you can find other
ways to debug, including proving your program correct before it ever
hits hardware.

I prefer the old style debug by the printouts to a terminal, toggling LEDs and output the waveforms.

But in the real world, the capability is there, might
as well put the necessary header on the board unless you are extremely
space constrained and can't even fit the signals on a miniaturized
version.

My motto is "eliminate the unnecessary"


Vladimir Vassilevsky
DSP and Mixed Signal Design Consultant
http://www.abvolt.com

.

Relevant Pages

  • Re: Low profile RS232-DB9
    ... any other pin for as long as you wanted and it would cause ZERO damage to ... When I was working at FMC, designing controllers for naval missile ... How the chip handles short circuits depends on how the power supply ...
    (sci.electronics.design)
  • Re: [linux-kernel] Re: [PATCH] x86: provide a DMI based port 0x80 I/O delay override.
    ... I have piles of code that I wrote, spec sheets, code that others wrote at the time, and documentation from vendors that come from my personal experiences. ... Just don't condescend to a 55 year old who has been writing operating systems, compilers, and designing hardware for almost 40 years professionally. ... The normal timing problem was that an out or in operation to a board or chip required some time to elapse before the chip performed the side effects internally so that the next operation to it would have an effect. ... The documented timing requirements have to do with the state during the time it ticks over internally once per second. ...
    (Linux-Kernel)
  • Re: Commodore 128 users...unite!
    ... > Designing a VIC-chip to handle 80 columns would have been technically ... into a new VIC chip. ... and I think many of the software applications would have used dual SID ... adding that useless Z80 and the extra SID would have gotten tons more use ...
    (comp.sys.cbm)
  • Re: How to Build a Board with DSP chip
    ... fyi, iirc, TI already has an off-the-shelf RTOS for their newer DSP chip line, ... > they can sell you a BSP. ... or if you are designing your own ...
    (comp.arch.embedded)
  • Re: FPGA musings
    ... > harder) than designing complex software! ... > It's a lot more than a weekend project to design a Zip Chip. ... This can't be called "complex hardware", it's not at all by todays ... Jorge Chamorro Bieling ...
    (comp.sys.apple2)