Re: Demodulating AM pulse width coding (long post)

Thanks for the reply. It is nice to be able to bounce ideas off of
someone.

On Apr 27, 5:17 pm, Tim Wescott <t...@xxxxxxxxxxxxxxxx> wrote:

I can see a lot of different approaches to this problem, and which one is
'best' depends greatly on your circumstances. I don't think your
approach is bad in itself, but it may be overly complicated and it will
only work well in a low-noise environment (in particular I suspect that
your synchronization method is weak).

You may find it more useful to only filter the values of '1' pulses, and
set your threshold to 2/3 the '1' level. This will make your filter
fairly immune to the distribution of ones and zeros within a message, and
should give you a more consistent threshold once it has latched on to the
right threshold value. If that algorithm gets confused by too many
zeros, then consider using a pair of envelope detectors to separately
track the '1' and '0' levels, and set your threshold between them.

I have not analyzed the message in detail, but the general case
guarantees at least 25% low cycles because of the protocol. There are
15 out of the 100 bits that are always zeros with only 20% high
cycles. It looks like once a year 47 of the data bits are zeros with
20% high cycles. So there will be cases where less than a third of
the carrier cycles are high and a low pass filter on the average won't
sufficiently smooth them out.

I'm not sure what you mean by "a pair of envelope detectors". If you
mean I should have two averaging circuits, one for the highs and one
for the lows, I can see that working ok. I would then split the
difference to get the threshold. That would not be too hard to
implement.


Tracking the carrier phase with a PLL will make the system much more
robust to noise (zero crossing methods tend to enhance noise), assuming
that the carrier phase doesn't change much with time. Ditto tracking the
data timing with a PLL. If you track both sets of timing with PLLs then
you can make a nice set of three matched filters to the three data
symbols, and get yourself a near-optimal demodulator in the presence of
noise.

The sensitivity of the zero crossing to noise did occur to me as I was
making the post. My simulation did not account for that. When you
refer to low noise, can you put a dB figure on that? I am sure the
customer will be happy with this working in a 10 dB SNR environment.

I can design a digital PLL if I need to. But the first pass will not
use the PLL since I have to get something working in about two weeks.
Then I have a month or so to tweak the design to work better. I can
add a PLL then.

I can't say I understand your description of tracking "both sets of
timing". Do you mean to have a PLL for the carrier as well as a PLL
for the data? The carrier and data are synchronous at 10:1. If I am
tracking the carrier, then all I have to do is sync to the data pulses
and I should be good.


If acquisition time is important and you have processing power to throw
at the problem you can sample the data a second (or two or three) in
advance and process it in advance for the synchronization information,
then process it again to extract the data. This would give you about the
same performance as my PLL suggestion above, but it'd give you just as
good of reception of the very first message as all the rest of them
(assuming all but the noisiest of environments).

I can't say I understand this at all. The messages are real time by
definition since it is a time code. I have to decode the bits and
pass them on as quickly as I receive them. I can take some time to
lock into the signal, but once locked, I can't buffer messages to
process them.

Thanks for your comments. I appreciate it.

Rick

.

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