jitter calculation for ADC

Hello group,

How do I calculate the jitter for an ADC driven by a 125 MHZ. this 125 MHZ
is generated by a PLL circuit with 10MHz ref clock that has 10 ppm.

My question really is if the PLL circuit is driven by a clock with a
jitter x, will the output jitter be x or will it be magnified?


.