high speed data aqusition system
- From: "soymilk" <sasha.smiljanic@xxxxxxxxxxxxxxxxxxx>
- Date: Fri, 22 Feb 2008 07:10:30 -0600
Hello DSP folk
I am considering my options for a high speed data acquisition system.
Typicall operation will be to arm (and start streaming data to memory),
trigger and run till memory is full using a circular buffer with a
predefined amount of pre-trigger data.
Current plan is to use an AD9252, 14 bit, 8 channel ADC, with eight LVDS
outputs, route to a FPGA (cyclone III) to be used to clock and interface
to the ADC, store data into RAM (probably external DDR) - and use an
external MCU for arming, triggering, and downloading data to a MAC/PHY
Ethernet or memory card for latter retrival.
Parts I know I can do is the analogue front end, and streaming the data
into the MCU and onto the ethernet/memory card.
I have done a bit of FPGA, design in the past, so have an understanding,
but this is my weakness.
Does anyone care to comment on the proposed topology, suggest
pitfalls/alternatives, or know of any existing demo modules/boards that
may be able to already achieve this. I have checked out the parsec adc
board http://www.parsec.co.za/PM480.htm, the main issue with it, is the
PCI bus, I did not want to have to have a PC, and secondly, the drivers
for the PCI bus, which I also did not want to have to write.
.
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