Re: 32bits division
- From: Darol Klawetter <darol.klawetter@xxxxxxxxxx>
- Date: Wed, 5 Dec 2007 10:03:03 -0800 (PST)
On Dec 5, 10:27 am, fengxiao_hh <fengxia...@xxxxxxxxx> wrote:
hi,
how to implement the 32bits division on the fix point C6400 without
loop?
use C programe, and intrinsics.
thanks
If your DSP doesn't have a hardware division operation, maybe my FPGA-
based fixed-point division experience can help. First, I asked myself
the following questions:
1) Does it have to be single clock-cycle division? It did.
2) Can the division be approximate? It could.
3) Can the operands be scaled so that the divisor can be a power of 2,
which means that the divide is just a shift operation? It couldn't.
This is what I did:
1) Multiplied by the reciprocal instead of dividing
2) Defined the largest possible fixed-point value to be the numerator
of my reciprocal
3) Created a reciprocal lookup table with enough resolution for my
application. I only needed to take a some number of most-significant
bits of the divisor to attain the resolution I needed. This allowed
for a practically-sized look-up table.
4) Used the MSBs of the divisor as an index to the lookup table
5) Multiplied the reciprocal given from the table by the "dividend"
Now I know that this can be done in one cycle by a DSP, but it would
be faster than a loop.
.
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