Re: Lattice FPGA

On Nov 30, 8:21 am, Alfreeeeed <Alfredo.Tad...@xxxxxxxxx> wrote:
Hi everyone ,

I am trying to implemente a bandpass IIR filter in a FPGA. It works
fine in SOS sections but we are trying to cut down the latency of it.
First suggestion was to use the parallel form .Once we got all the
residues and put them in the architecture of the filter , the
frequency response was deficient comparing to the IIR SOS band pass
filter , although the bandwithd was the same the rejection and the
attenuation at the bandpass were not. So we decided to try Lattice.
Coupled All-Pass , ARMA , LWDF etc. If we convert the structure in
Matlab from DF1SOS to any Lattice , the results are very good
but................. When I realize the model in Simulink i find out
that I have much more multiplications than I used to have in the
former architecture. ¿ Is this right? , ¿Lattice structure uses more
multiplications than other forms? I believe it is almost two times
bigger. Somo model realizations uses complex coefficients , making
that harder to implement. Please tell me if I am too out of subject.

Thanx

Alfredo

Heh - when I saw the title of this post I thought you were referring
to FPGAs from the manufacturer Lattice, not a lattice implementation
of a filter. After reading through however I agree you're in the right
place, although renaming the post might make it seem more on-topic and
catch more attention.

That said, I'm not surprised by the results you're getting:

* Cascaded SOS implementations are typically pretty hardware
efficient.
* Parallel SOS implementations are very sensitive to quantization
effects.

I've got not experience with lattice structures though - I'm surprised
that they're a candidate for improving latency since I thought they
were essentially cascades as well. It doesn't seem like that would
give you a shorter pipeline than a cascaded SOS.

EB
.

Relevant Pages

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