Re: Digital PLL acquisition problem
- From: Vladimir Vassilevsky <antispam_bogus@xxxxxxxxxxx>
- Date: Thu, 15 Mar 2007 16:43:01 GMT
patrick.melet@xxxxxxxxxxxxx wrote:
I made a digital PLL, with multiplier based phase detector, digital
loop filter C1 + C2/(1-z^-1) and a digital NCO with 16 bits
accumulator
I want to lock on a 22170 Hz sine signal in 10 ms lock time
My problem is when I don't have the 22170 Hz signal, my output filter
sweep very slowly (1 second) beetween min and max of my input NCO and
don't lock when my 22170 Hz signal is on
So I put a window at the ouput of my filter to only sweep in a 2600 Hz
window
And when this ouput is out of this window I reset the filter
accumulator to its maximum value, now the ouput of the filter sweep
this window very slowly ( about 2 seconds)
So with this when I put my 22170 Hz off and on my loop locks into it,
but I have a very long lock time ( 200 ms) and not 10 ms...
Is in acquisition mode I have to "manually" sweep my input NCO in the
2600 Hz window and look at the ouput of the loop filter to say if I'm
lock or not ?
1. You should use the state machine frequency/phase detector, not a multiplier. This will guarantee the reliable quick PLL pull-in.
2. The pull-in time depends on the loop filter parameters. There is a tradeoff between the PLL noise bandwidth and the pull-in time.
3. The RMS variation of the NCO frequency can be used as the measure of PLL lock.
Vladimir Vassilevsky
DSP and Mixed Signal Design Consultant
http://www.abvolt.com
.
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