Re: adc sample rate lower than expected
- From: "Noway2" <no_spam_me2@xxxxxxxxxxx>
- Date: 3 May 2006 08:24:45 -0700
wolfgang.strasser@xxxxxxx wrote:
Hello NG!
I'm working with a TI TMS320F2808 DSP; system clock set to 100Mhz.
I want to use the ADC converter at a frequency of 12,5Mhz, and so i set
the core clock divider to 4 to achieve a division with 8: 100Mhz / 8 =
12,5Mhz.
AdcRegs.ADCTRL1.bit.ACQ_PS = 0;
AdcRegs.ADCTRL3.bit.ADCCLKPS = 4; // Core Clock Divider: => SYSCLK / 8
AdcRegs.ADCTRL1.bit.CPS = 0; // Core Clock Prescaler
But independent of the set core clock divider, I always achieve an ADC
sample rate of (about) 5 Mhz. It seems that the adc sample rate is
always SYSCLK/20, but I can't find any parameter to set this factor.
The used conversion algorithm is as follows:
// ...
idx=0;
while(idx<=BUF_SIZE) {
SampleBuffer[idx] = (AdcRegs.ADCRESULT0>>4);
idx++;
}
// ...
May anybody has an idea?
Thanx in advance!!!
Wolfgang
A few things:
First, I am going to assume that your clock settings are correct
without double checking them. Based upon what I know of how the
presclares work in the 28xx family, they look correct off the top of my
head.
Second, If the code snipit above is what you are using to read the ADC,
something looks suspicious. The code will simply loop through reading
the ADC result buffer and store it in the SampleBuffer array. There is
no mechanism to control the timing in your code sample
Third, I believe your timing register settings control the ADC clock
rate. The ADC does not convert at that rate as it takes numerous clock
cycles to perform a conversion. I suspect that this is where your rate
difference problem lies. You need to cleary understand the how the
clock rate relates to the ADC conversion rate, which is typically by a
multiplier or factor. For example if you clock period is 1us and it
takes 16 clocks to perform the conversion you maximum sample rate will
be 16us or 62.5KHz.
What I would suggest that you do is first, determine the clock rate
necessary to achieve a conversion time that is less than your desired
maximum conversion rate and set the ADC control registers to provide
this. Next, set the ADC to start on a timer interrupt and set the
timer to your desired conversion rate. Use the ADC interrupt to remove
the data from the conversion results buffer and place in your array.
.
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