Re: [OT?] what's a FPGA?



rickman wrote:
Richard Owlett wrote:

I have a interest in speech recognition. I haven't purchased anything
because users *and* VARs have told be I probably wouldn't be satisfied.
[My desires would be better met by a 'discrete speech' rather than the
current orientation to 'continuous speech -- but that discussion goes
far OT]

That said, I read in comp.speech.users and comp.speech.research of what
my gut says are excessively tight constraints on the acoustic
environment [especially normal office noise and careful mike placement].

I envision an external signal conditioning module containing
5-8 band pass linear phase with 5 < Q < 20
2-10 band pass linear phase with 20 < Q < 200
[all above outputs in time sync with a latency of < .1 second]
{ How I combine this to get off chip is up in the air.]

The above is based on some almost *TOTALLY UNTESTED* ideas of what I
really want to accomplish. I was thinking the parallel nature of what I
envisioned lent it to a FPGA approach.


Given that what you really want, but did not state, is an evrironment
for exploring your ideas, I would recommend that you focus on your
algorithms by writing software on a PC.

I'm already doing almost that. I'm using Scilab to explore various
pieces of "the problem" [N.B. not "the solution" ;]

While looking at "the problem", I started wondering if a massively
parallel solution would be worth exploring.

/start side bar
I think in different paths than most modern engineers
[won't say what family thinks ;]
Jerry's old enough to pick up on inferences of following
1. My father
a. helped build and *LEGALLY* operate a spark gap transmitter
b. perused a BS(ME) as it had more EE than a BS(EE) at that time
c. published article(s?) on "magnetic amplifiers"
2. I
a. remember chopper stabilized op amps
b. have used op amps which required >= 1 inch of 19" rack
[ how many youngsters even know what a 19" rack is ]
c. read of/on/about *ANALOG COMPUTERS* while still used ;)
/temporary end side bar :)

I suspect that the key to my thought pattern is 2.c.

YEPP
want 'digital' implementation of *ANALOG COMPUTER*

How many analog simulation blocks can I stuff in a FPGA?

Jerry, you program/use FORTH, do you get an idea of where I wish to
attempt and possibly to go?

The decision of whether to use
an FPGA or a DSP is an implementation decision. Given that your
signals are audio frequency, even lower that the full range of human
hearing most likely, I would say you can do anything you can think of
on a DSP. There are low power, fixed point devices that can process
100's of millions instructions per second. There are larger, more
power hungry units that can process up to a billion or more useful
instructions per second. So it is unlikely that you can create an
algorithm that requires more processing than this from an 8 kHz sampled
audio stream.

Initial sampling will be at 44 kHz or greater.

My "gut" says that this is part of problem with modern speech
recognition systems -- they "ignore"/"throw away" *too* much data.
The output of my 'black box' would be "sampled" as speech recognizer
_PRESUMES_.


That said, there is also the development effort to consider. Typically
before you even begin working with DSPs the algorithm is fully explored
and tested on a PC in C or other environment of your choice such as
Matlab. Once you have a fully functional model, then you can be
concerned with the implementation. This goes double for FPGAs because
they are not nearly as flexible to significant archetecture changes.
Sure, you can change your code (VHDL or verilog), but typically the
code is woven tighter and changes can impact the code a lot more.

Now you come up against another aberrant aspect of how I think.

I often drive experts nuts.
I ask a question they -- *THROUGH EXPERIENCE* -- 'recognize' as ill
defined. They try to *FORCE* me into asking what they consider a "well
defined" question.

_BUT_ I *did not* want to ask their "well defined" question.

I WANTED TO ASK *my* QUESTION ;)
In this case, due to possibility of parallelisms, FPGA's came to mind.
So my question is much more about
"How much of this would fit on what size FPGA?"
rather than
"Would a sane person use a DSP or FPGA for this application?"





The main difference between the two is that the DSP has just one or two
ALUs to do the MAC operation (which is the most often used function in
DSP). It runs at a high speed and, just like in a PC, it switches
between functions to do things serially, but appear to be in parallel.
The FPGA is capable of actually doing things in parallel. With very
high speed sample rates this can be important since there is not time
to switch a DSP between different tasks. But at audio rates there is
normally tons of time for the DSP to do many different processing on
the data before the next sample or batch of samples come in.

So in summary, it would be prudent to simulate your algorithm on a PC
to get the idea fleshed out and working. Then you can decide if you
want to implement on a floating point DSP, a fixed point DSP or an
FPGA. Then you get all the fun of actually doing the real work.



.



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