Interleaver design for adaptive bit loading

Hi,

I am looking for an interleaver apt for adaptive bit loading scheme.
Am not able to find much material for interleaver design in this scenario.

Can anyone suggest some papers?
I have an RS encoder along with adaptive modulation on the subcarriers.
So, extent of interleaving required (so that interleaving does not worsen
busrt error correction of RS encoder) is also another aspect I am looking
at.

thanks in advance!
sandy


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