Re: Practical implementation question
- From: Al Clark <dsp@xxxxxxxxxxxxxxxxxx>
- Date: Mon, 07 Nov 2005 14:27:49 GMT
"Noway2" <no_spam_me2@xxxxxxxxxxx> wrote in news:1131372442.830561.68680
@g14g2000cwa.googlegroups.com:
> All,
>
> I am working on a project where I have designed a microprocessor board
> based on a fixed point DSP. So far, my experience with DSP has been
> almost entirely simulation based and I am presently at the stage where
> I am starting to apply some of the theory to the real world
> application. At this point, I have run into something, which I have
> not satisfactorilly covered in my readings and I am hoping that
> somebody could help me out by providing some suggestions.
>
> As a bit of background information: My application uses a 12 bit ADC
> that runs single supply 0 to 3 volts, (ideally) corresponding to
> converted outputs of 0 to 4095. To handle bipolar signals, my
> interface hardware introduces a zero input offset of 1.5 volts, which
> represents the midpoint of the conversion range and scales the inputs
> into the 0 to 3 volt range. Consequently, negative polarity signals
> appear at the input of the converter between 0 and 1.5 volts and
> positive polarity signals are between 1.5 and 3 volts. As one of the
> intial experiements, I applied a sinusoidal signal to the converter and
> plotted the result on a graph window and as expected I saw a sine wave
> of the expected ampltiude and frequency, centered about the midpoint of
> 2048. The ADC outputs are left justified.
>
> My question concerns how to best handle the numerical representation of
> the bipolar signals. My initial thought was that I could subtract
> 2048 from each of the sampled values and this results in a two's
> complement, postivive and negative representation. My second thought
> is that I could treat the MSB as a sign bit, but this could result in a
> 180 degree phase shift as the "positive" half cycle would be
> represented by the larger numbers with the MSB set if I follow what I
> believe to be the standard convention. My third thought is that I
> could somehow use the Q format representation, but I am not totally
> clear on this concept yet, or how it applies to my situation.
>
> If my understanding is correct, the problem is one of user or
> programmer interpration as the numbers are just that and can be passed
> to an algorithm, such as a filter, and I will still receive the
> mathematically, or rather numerically, correct result.
>
> I was wondering if anybody coulld help steer me in the correct
> direction with some suggestions of how best to represent the numbers or
> some links to some good informational sources on this subject.
>
>
My guess is that you will you want the data in fractional twos complement
format. This would be twos complement as you suggested by subtracting
2048 and then bit shifting the result so that the sign bit is the most
significant bit. For example, if you have a 16 bit DSP, you would shift 4
bits. This would cause your values to range from 0x7FF0 to 0x8000. This
range is usually interpreted as values from almost 1 to -1. In ADI speak,
this would be 1.15 format, I think TI calls it Q15.
--
Al Clark
Danville Signal Processing, Inc.
--------------------------------------------------------------------
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.
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