Re: Performance and Flash Pipelining on TI 28F12 DSPs



Jack Klein <jackklein@xxxxxxxxxxx> wrote:

Roberto Waltman wrote in comp.dsp:

>> We are developing an embedded controller based on a TI 28F12.
>> This new product consists of single board replacing an older system
>> containing 8 (different) boards, each one running code on an Intel
>> 80196 16-bit microcontroller.
>> ....
>> So, my question to the group: What kind of degradation from the
>> theoretical figure of 150 MIPS can we expect running code that does
>> not take advantage of the special DSP instructions and running only
>> from internal flash?
>>...
>> Also, how big an impact has the "Flash Pipeling" ? Without it the
>> effective instruction execution rate is around 25Mhz, which puts us in
>> the same ballpark as the aggregated performance of the original
>> system...

>We've got two motion control boards using the 2812 in our new product
>line that began shipping a few months ago.
>....
>You would think that external RAM would be faster than the flash, by a
>factor of about 1.5, and it is when flash pipelining is turned off.
>But with flash pipelining turned on, code running from flash is
>noticeably faster than the same code running from RAM. We've never
>made any specific attempts at timing it, because it is not important
>for our application, but it appears to be at least twice as fast.
>....
>Still, I would suggest making every effort into copying your highest
>speed interrupt service routines into internal RAM, and assigning any
>static data variables they use in internal RAM as well. You can
>define internal RAM segments and put code and data in them on a
>function-by-function or file-by-file basis. It's pretty easy, there's
>a TI app note that covers it pretty well.
>...
>You can see that loops aren't optimized for pipelining at all, but
>they still run much faster than RAM.

Jack,

Thanks for the information - Until we get proper benchmarks running
I'll condense your post to "you can expect ~50MIPS"
That should give us enough room to breathe, until the marketing guys
come back with a new list of features, of course.

Thanks again,

Roberto Waltman

[ Please reply to the group, ]
[ return address is invalid. ]
.



Relevant Pages

  • Re: Performance and Flash Pipelining on TI 28F12 DSPs
    ... >>> We are developing an embedded controller based on a TI 28F12. ... >>> This new product consists of single board replacing an older system ... >>> from internal flash? ... >>static data variables they use in internal RAM as well. ...
    (comp.dsp)
  • Re: [F2812 EZDSP] Inaccurate timing executing code relocated from Flash
    ... When i run from JTAG emulator (execute completely in RAM), ... when i burn my code into the flash using the flash ... > 0x3f80000 is beginning of dsp internal RAM ... Yes, your way of relocating the code is very, very wrong, although I ...
    (comp.dsp)
  • Re: program flash on brand new board
    ... Any idea using the Macraigor device, ... Do you have flash programmer software to write the flash? ... Macraigor ARM flash software requires 2K of internal RAM to work. ...
    (comp.sys.arm)
  • Re: program flash on brand new board
    ... I have a new board with an arm 946 processor, blank flash, sdram. ... I have a Macgraigor jtag device. ... Macraigor ARM flash software requires 2K of internal RAM to work. ...
    (comp.sys.arm)