Help need for distributed Hardware Simulation

Hello guys,
I am EDA guy, looking at prospects of building an HDL simulator which
can use parallelism in real-world hardware designs to simulate them
very fast on some dedicated hardware. Before reading further, please
know that my experience has solely been with EDA emulators and
simulators, and some of what I say might sound like crap to your
seasoned Parallel Computing guys.

The hardware of my choice would not be a supercomputer, but (I don't
know if such a thing exists), maybe a PCI slot card, with ten general
purpose processors, having their own local memories that they can
access very fast. These memories would be used as "scratch-pads" by the
processors, and the relevant data from these "scrath-pad" memory would
be updated to the main memory.
The central processor (the "main" processor of the workstation/desktop
computer) would run a simulation kernel, and schedule the threads on
the processors on the board.

Now my question is, does something like that exist? If it doesn't, what
comes closest to my requirement.

Guys, any help would be appreciated. I know, my question seems like a
utopic vision of something I desperately want. Please give me all the
help you can.

-Niraj

.

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