Almost an entropy reducer (bias element)?
- From: jacko <jackokring@xxxxxxxxx>
- Date: Wed, 26 Nov 2008 13:15:56 -0800 (PST)
Hi
here is a file k.vhd which I am still investigating pseudorandom
correlation between bits used between similar cycles. So apart from
signal save operations, it is the latest. Pay attention to copyright.
This is the best type of source written in VHDL.
cheers
jacko
-- (C)2008 K Ring Technologies Semiconductor
-- BSD http://nibz.googlecode.com (no support)
-- Comercial licencing available
-- Tel: +44 796 797 3001 (a real space odessy)
-- Maintained by Simon Jackson, BEng.
-- E-mail: jackokring@xxxxxxxxx
-- Hardware support kodek for nibz
library ieee;
-- library altera;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
entity k is
port (
do : buffer std_Logic;
di : in std_logic;
busy : buffer std_logic;
comde : std_logic;
clk : in std_logic;
-- a rising edge signal (run)
run : in std_logic;
-- for setting the prbs
-- may be of use as a general prbs ...
load : in std_logic_vector(15 downto 0);
save : buffer std_logic_vector(15 downto 0);
rw : in std_logic;
sel : in std_logic
);
end entity;
architecture rtl of k is
signal asymproc : std_logic;
signal which : std_logic;
type s is (action,motion);
signal state : s;
-- intermediates
signal wind : std_logic_vector(4 downto 0);
signal procp : std_logic_vector(1 downto 0);
signal tapx : std_logic;
signal ends : std_logic;
-- process control flags
signal procdo : std_logic;
signal winddo : std_logic;
signal modo : std_logic;
signal runlast : std_logic;
signal whenok : std_logic;
signal tmp : std_logic;
constant tap : natural := 3;
signal pmux : std_logic_vector(15 downto 0);
begin
process(clk)
-- prbs
begin
end process;
procp <= pmux(1 downto 0);
procdo <= procp(1) and procp(0);
-- set motion velocities via probability switching
modo <= procdo xor which xor do xor '1';
-- set sampling window
wind <= pmux(7 downto 3);
winddo <= wind(4) and wind(3) and wind(2) and
wind(1) and wind(0);
process(clk)
-- k state machine
begin
if(rising_edge(clk)) then
runlast <= run;
end if;
if(rising_edge(clk) and busy = '1') then
case state is
when motion =>
asymproc <= asymproc xor modo;
state <= action;
when action =>
if(asymproc = '0') then
if(which = '0') then
-- sample
if(winddo = '1') then
busy <= '0';
-- sample do
end if;
else
-- random
do <= do xor procp(0);
end if;
else
which <= which xor procdo;
end if;
state <= motion;
end case;
-- NB. if 2nd rising edge run before busy zero
-- then misses a radix slot
elsif(rising_edge(clk) and whenok = '1' and busy = '0') then
-- set busy, cleared by kodek finish bit
busy <= '1';
whenok <= '0';
do <= tmp;
end if;
if(rising_edge(clk) and runlast = '0' and run = '1') then
whenok <= '1';
tmp <= di;
end if;
-- prbs
if(comde = '1') then
ends <= save(15);
else
ends <= save(0);
end if;
tapx <= save(tap) xor ends;
if(rising_edge(clk) and busy = '1') then
if(comde = '1') then
save <= save(14 downto 0)&tapx;
else
save <= tapx&save(15 downto 1);
end if;
end if;
if(comde = '1') then
pmux <= save;
else
pmux <= tapx&save(15 downto 1);
end if;
-- load
if(rising_edge(clk) and sel = '1' and rw = '0') then
-- NB. a load while busy can be a random number gen
-- but not much use in general operation
-- do a kind of reset
asymproc <= '0'; -- rand/samp side
which <= '0'; -- samp side
state <= motion; -- perform motion methods first
-- (begin and end on them)
-- assign essentials
save <= load;
end if;
end process;
end rtl;
.
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