Hi
I am wondering how compilers with aggressive PRE work for CISC
compilers. CISC instruction sets provide addressing modes where the
variable can be in symbolic form residing in memory. for example
add a, b, c - Registers need not be allocated.
Since PRE aims at trying to promote candidates into pseudo registers,
the subsequent passes may not have the opportunity to realize the
addressing mode (lets assume the addressing mode is sometimes
beneficial over using registers)
Two questions if somebody can help me find answers:
1. Are there any PRE algorithms that are aware of such addressing
modes ?
2. if not, how else can the subsequent passes recover so that they can
use these addressing modes?
Re: Burning Match ... | push 40h ... You sure know that this addressing-mode variant is a compilers job!... As many compilers may make you believe in more addressing modes,...mov ah,0; shorter/faster than xor ah,ah ... (alt.lang.asm)
Re: Code density and performance? ... >>One of my previous compilers (for embedded system that used VAX- ... >>hard to do global pattern matching for the entire function if you are ...unusual addressing modes.... > You used the full range of VAX addressing modes?... (comp.arch)
Re: TI MSP430 ...PDP-11 ISA, with slight changes (fewer addressing modes, allowing twice as many ...registers) to avoid patent issues... ... been a hack in the MOV instruction to allow @Rn and @Rn+ modes in the destination. ... (comp.arch.embedded)
Re: TI MSP430 ... Of course, the architecture is a simplified version of the TMS9900 CPU, which was derived from the TI 990 minicomputer, which was in turn a rip-off of the PDP-11 ISA, with slight changes (fewer addressing modes, allowing twice as many registers) to avoid patent issues... ... modes of the msp430 really are appropriate for their target applications, or whether they would have been better off with the PDP-11 arrangement.... as long as you have a stack pointer and push/pop instructions.... (comp.arch.embedded)
Re: PIC vs ARM assembler (no flamewar please) ... addressing modes - you don't have to use half a dozen instructions just ... perhaps including the CPU32 addressing modes (all ... And having some more registers... The ARM instruction set is not particularly nice for assembler... (comp.arch.embedded)
