Re: LVS and Shorts in Virtuoso schematics?



The "short" (I assume that's equivalent to the "patch" component in the basic library) effectively creates an alias in the database, which says that two net names are equivalent.

Andrew,

Just out of curiosity, can you explain how the patch accomplishes this ? Is there some magic involved (perhaps it's treated specially by the schematic editor because of the schType property ?).

In Andreas's case, the STlib short component is rather reminiscent of the cds_thru ; it doesn't create any alias but gets netlisted as a very small resistor. To get rid of it in Calibre, it should be filtered by adding a rule such as

LVS FILTER R(SH) SOURCE SHORT

Perhaps the kit provides some switch to automate this process, it would make sense.


Cheers,
Stéphane
.



Relevant Pages

  • Re: LVS and Shorts in Virtuoso schematics?
    ... Is there some magic involved (perhaps it's treated specially by the schematic editor because of the schType property ?). ... the STlib short component is rather reminiscent of the cds_thru; it doesn't create any alias but gets netlisted as a very small resistor. ... LVS FILTER RSOURCE SHORT ... It does it by having magic properties on it, which is recognized by the schematic extractor. ...
    (comp.cad.cadence)
  • Re: static pointer to function
    ... I'm just trying to understand the alias attribute. ... Ah, aimless curiosity... ... In order to understand recursion you must first understand recursion. ...
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