comp.cad.cadence

Date Index

problems with visibility in Cadence, Dmitriy Shurin
- Re: problems with visibility in Cadence, Svenn Are Bjerkem
Anyone have spectre-mode.elc file for xemacs?, Mohit
- Re: Anyone have spectre-mode.elc file for xemacs?, Svenn Are Bjerkem
  - Re: Anyone have spectre-mode.elc file for xemacs?, Mohit
xc06 simulation problems, Roger Bourne
- <Possible follow-ups>
- xc06 simulation problems, Roger Bourne
  - Re: xc06 simulation problems, Andrew Beckett
run time error '76'- path not found, niki
Problem encountered during simulating with spectreVerilog, charles
- Re: Problem encountered during simulating with spectreVerilog, Andrew Beckett
Connecting SystemVerilog to Verilog-AMS, Stefan Joeres
Corner Analysis, vgarg82@xxxxxxxxx
- Re: Corner Analysis, jha . anuranjan
  - Re: Corner Analysis, Svenn Are Bjerkem
Problems with Synopsys DC and Cadance Confromal, cafm
how to accelerate DC solution for mtline, Geier
any simple flow from VHDL to technology ?, N. Hervé
- Re: any simple flow from VHDL to technology ?, N. Hervé
  - Re: any simple flow from VHDL to technology ?, Svenn Are Bjerkem
    - Re: any simple flow from VHDL to technology ?, Andrew Beckett
Re: techSetTechLibName/ddDeleteObj and LSW, Andrew Beckett
Gated clock CTS in SoCEncounter, zjlee516@xxxxxxxxx
Connectmodules and parameters, Stefan Joeres
PSS engine selection, Nicola Lofu
- <Possible follow-ups>
- PSS engine selection, Nicola Lofu
Re: probing signals in veriloga, Andrew Beckett
Is circuit a promising career?, lixiaoyao
- Re: Is circuit a promising career?, Martin Maschmann
- Re: Is circuit a promising career?, Svenn Are Bjerkem
Schematic Plot with Black Background, camelot
- Re: Schematic Plot with Black Background, Pete nospam Zakel
how to add model ami16N?, lixiaoyao
- Re: how to add model ami16N?, Martin Maschmann
- Re: how to add model ami16N?, Martin Maschmann
cadence simulation proble, please help, lixiaoyao
ultrasim w/ VCD and hierarchical mapping, oliver
net connectivity in cadence composer, atul799
- Re: net connectivity in cadence composer, Svenn Are Bjerkem
  - Re: net connectivity in cadence composer, Andrew Beckett
Skill mode for emacs, phil . jones2000
- Re: Skill mode for emacs, Andrew Beckett
  - Re: Skill mode for emacs, phil . jones2000
Accessing net voltages inside skill after spectre simulation?, Mohan R
- Re: Accessing net voltages inside skill after spectre simulation?, S. Badel
  - Re: Accessing net voltages inside skill after spectre simulation?, Andrew Beckett
Why AC analysis result doesn't agree with the transient result, Allen
- Re: Why AC analysis result doesn't agree with the transient result, S. Badel
  - Re: Why AC analysis result doesn't agree with the transient result, Allen
Skill question - resizing shapes, Jay
- Re: Skill question - resizing shapes, S. Badel
  - Re: Skill question - resizing shapes, Jay
Resistance calculation between 2 points, camelot
- Re: Resistance calculation between 2 points, Guenther Sohler
  - Re: Resistance calculation between 2 points, camelot
    - Re: Resistance calculation between 2 points, Guenther Sohler
    - Re: Resistance calculation between 2 points, camelot
    - Re: Resistance calculation between 2 points, camelot
    - Re: Resistance calculation between 2 points, camelot
Tetris on a Die, Gustav Gans
- Re: Tetris on a Die, Andrew Beckett
  - Re: Tetris on a Die, Gustav Gans
    - Re: Tetris on a Die, camelot
- Re: Tetris on a Die, S. Badel
- Re: Tetris on a Die, Tim
  - Re: Tetris on a Die, Tim
- Re: Tetris on a Die, robbin.bonthond@xxxxxxxxx
Re: Get the db object tied to a cdf, Andrew Beckett
- Re: Get the db object tied to a cdf, camelot
  - Re: Get the db object tied to a cdf, Andrew Beckett
What is the status of this thread, Svenn Are Bjerkem
Re: skill compiler, Andrew Beckett
Re: Load balancing (LSF), Andrew Beckett
- Re: Load balancing (LSF), raysonlogin@xxxxxxxxx
  - Re: Load balancing (LSF), Andrew Beckett
Re: Easiest way to have multiple persons work same database ?, Andrew Beckett
- Re: Easiest way to have multiple persons work same database ?, Poojan Wagh
  - Re: Easiest way to have multiple persons work same database ?, stroller
- <Possible follow-ups>
- Re: Easiest way to have multiple persons work same database ?, Svenn Are Bjerkem
Re: gms and gds waveform and in calculator, Andrew Beckett
Re: Auto Routing tool from Cadence?, Andrew Beckett
Re: Any Ocean scripts available for calculating eye opening?, Andrew Beckett
Re: iabstol, lowering of, Andrew Beckett
Re: ADE license requirement for spectreVerilog simulation, Andrew Beckett
Re: pss, Andrew Beckett
- Re: pss, fredo
  - Re: pss, Andrew Beckett
Re: Any experience with the sp1tswitch from analogLib?, Andrew Beckett
- <Possible follow-ups>
- Re: Any experience with the sp1tswitch from analogLib?, Svenn Are Bjerkem
Re: Testing Code Coverage of a SKILL Program, Andrew Beckett
Virtuoso cordinate, konnanur@xxxxxxxxx
- Re: Virtuoso cordinate, sajin
  - Re: Virtuoso cordinate, Andrew Beckett
- Re: Virtuoso cordinate, S. Badel
netlisting question ?, SS
connectivity information, sajin
- Re: connectivity information, S. Badel
  - Re: connectivity information, sajin
    - Re: connectivity information, DReynolds
Re: envSetVal, lorak88ATgmail.com
- Re: envSetVal, Andrew Beckett
Re: how to create a LEF file???, mikelou
Re: Convert Spice netlist to schematic view., mikelou
- Re: Convert Spice netlist to schematic view., Svenn Are Bjerkem
- <Possible follow-ups>
- Re: Convert Spice netlist to schematic view., johnlipsius
- Re: Convert Spice netlist to schematic view., hreidmarkailen
lvs and cdl netlists, kev
- Re: lvs and cdl netlists, S. Badel
  - Re: lvs and cdl netlists, kev
    - Re: lvs and cdl netlists, mikelou
Eldo MEASURE(EXTRACT) problem, sinan
- Re: Eldo MEASURE(EXTRACT) problem, S. Badel
  - Re: Eldo MEASURE(EXTRACT) problem, sinan
    - Re: Eldo MEASURE(EXTRACT) problem, sinan
sweeping the value of a capacitor in a subcircuit, Mohit
- Re: sweeping the value of a capacitor in a subcircuit, S. Badel
  - Re: sweeping the value of a capacitor in a subcircuit, Mohit
How to begin Cadence Design Systems?, lixiaoyao
- Re: How to begin Cadence Design Systems?, camelot
netlist changes during simulation, Guy_Sweden
- Re: netlist changes during simulation, Andrew Beckett
VHDL-AMS Q'Ltf, Mark
post on cdnusers, LindaM
query in simulation, ram
- <Possible follow-ups>
- query in simulation, ram
- query in simulation, ram
Re: Reduce netlist with parasitic resistors, Edward Kalenda
- Re: Reduce netlist with parasitic resistors, camelot
Re: layout to svg, noopster
- Re: layout to svg, Roger Light
  - Re: layout to svg, noopster
AWD results update causes spectre to slow to a crawl, whisker
ac after tran, -
- Re: ac after tran, Andrew Beckett
PyCell Studio & PCell Xtreme demo online, ciranova
for vita: really exciting nntp server access - kaz - (1/1), mose