comp.cad.cadence

• Date Index

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• EDA, PCB, Mentor Graphics programs 2006 - , programs,, loa210
• Tornado, VxWorks, Wind River, ARM, ArmCAD, National Instruments ( N.I. ) programs 2005 -, CDs, loa210
• Math Solving, and Statistics Programs, loa210
• Generating a Symbol for a Netlist, TuPaK
• Phase Noise Analysis tolerance, michael_skoufis
• cadence, Virtuoso
  • Re: cadence, vdvalk@xxxxxxxxxx
• creation of super pcell using 2 pcells, Pradeep Kumar Chawda
  • Re: creation of super pcell using 2 pcells, svilen
    • Re: creation of super pcell using 2 pcells, Pradeep Kumar Chawda
  • Re: creation of super pcell using 2 pcells, Jimka
• Aptivia, lorak88ATgmail.com
• How to open all the cell view in one library with skill?, Tech11
  • Re: How to open all the cell view in one library with skill?, vdvalk@xxxxxxxxxx
• Post-process Netlister output, Raj
  • Re: Post-process Netlister output, Andrew Beckett
    • Re: Post-process Netlister output, Raj
• NeoCell, Katie
• DFII with ATI graphic cards, Matthias Voelker
• Select and unselect in Virtuoso Schematics, Hugo Miguel Franca Santos
  • Re: Select and unselect in Virtuoso Schematics, S. Badel
    • Re: Select and unselect in Virtuoso Schematics, Hugo Miguel Franca Santos
• star RCXT, suresh
  • Re: star RCXT, vdvalk@xxxxxxxxxx
    • Re: star RCXT, S. Badel
• Database copy, Shankar
  • Re: Database copy, S. Badel
    • Re: Database copy, Shankar
• Virtuoso: Can't Enter Text Into Find Window, Edward Dodge
• maximum hop frequency vs. channel spacing, Kuan Zhou
  • Re: maximum hop frequency vs. channel spacing, Andrew Beckett
• Estimating power consumed by a SRAM for each input vector., kamesh
  • Re: Estimating power consumed by a SRAM for each input vector., raman
• Question:Schematic hierarchy descend in place using skill, tattvamasi@xxxxxxxxx
  • Re: Question:Schematic hierarchy descend in place using skill, tattvamasi@xxxxxxxxx
    • Re: Question:Schematic hierarchy descend in place using skill, John Gianni
• Netlisting with analogArtist, Guenther Sohler
  • Re: Netlisting with analogArtist, S. Badel
  • Re: Netlisting with analogArtist, Bernd Fischer
    • Re: Netlisting with analogArtist, Guenther Sohler
• VLE SKILL db objects, svilen
  • Re: VLE SKILL db objects, Bernd Fischer
    • Re: VLE SKILL db objects, svilen
  • Re: VLE SKILL db objects, S. Badel
• Cadence user community website, Linda Meyer
• Linear Technology, crboston@xxxxxxxxx
• License Cadence - Linux IC5141 - redhat 9, schlag
• Assigning minimum via number to net classes, Norman
  • Re: Assigning minimum via number to net classes, vdvalk@xxxxxxxxxx
• IC5141 is slow in RHEL3 sometimes., scorpius
  • Re: IC5141 is slow in RHEL3 sometimes., fogh
    • Re: IC5141 is slow in RHEL3 sometimes., scorpius
• noiseSummary in OCEAN, phil
  • Re: noiseSummary in OCEAN, fogh
• about skillscripts, kranthibhushann
  • Re: about skillscripts, chinni
    • Re: about skillscripts, Svenn Are Bjerkem
      • Re: about skillscripts, kranthibhushann
      • Re: about skillscripts, Andrew Beckett
      • Re: about skillscripts, kranthibhushann
      • Re: about skillscripts, kranthibhushann
      • Re: about skillscripts, Bernd Fischer
      • Re: about skillscripts, kranthibhushann
      • Re: about skillscripts, kamal
      • Re: about skillscripts, kranthibhushann
      • Re: about skillscripts, kranthibhushann
      • Re: about skillscripts, kranthibhushann
• analog layout, jutek
  • Re: analog layout, vdvalk@xxxxxxxxxx
    • Re: analog layout, jutek
      • Re: analog layout, vdvalk@xxxxxxxxxx
• VXL diagonal select, rickm
  • Re: VXL diagonal select, Andrew Beckett
    • Re: VXL diagonal select, rickm
      • Re: VXL diagonal select, Frank E. Gennari
      • Re: VXL diagonal select, S. Badel
    • Re: VXL diagonal select, Kholdoun TORKI
      • Re: VXL diagonal select, Andrew Beckett
      • Re: VXL diagonal select, rickm
      • Re: VXL diagonal select, S. Badel
      • Re: VXL diagonal select, rickm
      • Re: VXL diagonal select, S. Badel
      • Re: VXL diagonal select, rickm
      • Re: VXL diagonal select, Andrew Beckett
      • Re: VXL diagonal select, rickm
      • Re: VXL diagonal select, Andrew Beckett
• how to automatically simulate ADE states one by one, Kirk
  • Re: how to automatically simulate ADE states one by one, Svenn Are Bjerkem
    • Re: how to automatically simulate ADE states one by one, ram
• GRID problem in Virtuoso Layout XL, Albert
  • Re: GRID problem in Virtuoso Layout XL, Bernd Fischer
• adding elements to the end of the list, tattvamasi@xxxxxxxxx
  • Re: adding elements to the end of the list, S. Badel
    • Re: adding elements to the end of the list, tattvamasi@xxxxxxxxx
    • Re: adding elements to the end of the list, Andrew Beckett
• Re: setting up libraries in Virtuoso, Svenn Are Bjerkem
  • Re: setting up libraries in Virtuoso, John Gianni
• Re: Installing Cadence on Sun Solaris 9, Svenn Are Bjerkem
• VCO frequency vs tuning voltage - how to display simulation data, tempora
  • Re: VCO frequency vs tuning voltage - how to display simulation data, Thomas Ussmueller
    • Re: VCO frequency vs tuning voltage - how to display simulation data, tempora
      • Re: VCO frequency vs tuning voltage - how to display simulation data, Thomas Ussmueller
• SKILL: Virtuoso command to Save View/Restore View WITH Hierarchy, Edward Dodge
  • Re: SKILL: Virtuoso command to Save View/Restore View WITH Hierarchy, Svenn Are Bjerkem
    • Re: SKILL: Virtuoso command to Save View/Restore View WITH Hierarchy, Andrew Beckett
      • Re: SKILL: Virtuoso command to Save View/Restore View WITH Hierarchy, John Gianni
• SKILL: Virtuoso Bindkey to Toggle Read-Only Mode?, Edward Dodge
  • Re: SKILL: Virtuoso Bindkey to Toggle Read-Only Mode?, Suresh Jeevanandam
    • Re: SKILL: Virtuoso Bindkey to Toggle Read-Only Mode?, Svenn Are Bjerkem
    • Re: SKILL: Virtuoso Bindkey to Toggle Read-Only Mode?, Edward Dodge
• "Create Net Class" in LayoutXL, Norman
• Adding Icons to Layout window, vtcad
  • Re: Adding Icons to Layout window, Roger Light
• Question about a warning message in PSS+PNOISE simulation for LC VCO, cmhsuitri
• Load LSW window, camelot
  • Re: Load LSW window, Bernd Fischer
• Re: Problem with analog artist simulation, fogh
  • <Possible follow-ups>
  • Re: Problem with Analog Artist Simulation, Svenn Are Bjerkem
• Re: alternative way to load design variable?, fogh
• Re: netlisting, Andrew Beckett
• Removing nil from list, vtcad
  • Re: Removing nil from list, Bernd Fischer
    • Re: Removing nil from list, Jean-Marc Bourguet
  • <Possible follow-ups>
  • Removing nil from list, vtcad
    • Re: Removing nil from list, Andrew Beckett
• VLE:SKILL absIsPointInsideFig, svilen
  • Re: VLE:SKILL absIsPointInsideFig, Bernd Fischer
• Graph datastructure using skill, tattvamasi@xxxxxxxxx
  • Re: Graph datastructure using skill, tattvamasi@xxxxxxxxx
  • Re: Graph datastructure using skill, Sylvio Triebel
    • Re: Graph datastructure using skill, tattvamasi@xxxxxxxxx
      • Re: Graph datastructure using skill, Andrew Beckett
      • Re: Graph datastructure using skill, DReynolds
• plotting internal verilog-A signals, danmc
  • Re: plotting internal verilog-A signals, Andrew Beckett
• Assura RCX, tritue
• How to compute 1/f noise corner, pureck
  • Re: How to compute 1/f noise corner, Belal
• Spectre alter statement very slow, Joel
  • Re: Spectre alter statement very slow, fogh
    • Re: Spectre alter statement very slow, Joel
• What does PG stand for?, vtcad
  • Re: What does PG stand for?, Dominic Duvarney
    • Re: What does PG stand for?, vtcad
  • Re: What does PG stand for?, Edward Kalenda
  • Re: What does PG stand for?, fogh
• Generate .lib from standard cell using Cadence software, cmos_student
• to generate a script, chinni
  • Re: to generate a script, Andrew Beckett
  • <Possible follow-ups>
  • to generate a script, chinni
    • Re: to generate a script, Andrew Beckett
      • Re: to generate a script, chinni
      • Re: to generate a script, S. Badel
      • Re: to generate a script, chinni
      • Re: to generate a script, S. Badel
      • Re: to generate a script, chinni
      • Re: to generate a script, S. Badel
      • Re: to generate a script, chinni
      • Re: to generate a script, Andrew Beckett
      • Re: to generate a script, chinni
      • Re: to generate a script, Svenn Are Bjerkem
      • Re: to generate a script, chinni
      • Re: to generate a script, chinni
      • Re: to generate a script, S. Badel
      • Re: to generate a script, chinni
      • Re: to generate a script, chinni
      • Re: to generate a script, Svenn Are Bjerkem
      • Re: to generate a script, chinni
      • Re: to generate a script, fogh
      • Re: to generate a script, chinni
      • Re: to generate a script, chinni
      • Re: to generate a script, fogh
      • Re: to generate a script, Svenn Are Bjerkem
      • Re: to generate a script, Andrew Beckett
      • Re: to generate a script, fogh
• The Designer's Guide Community, KenKundert
  • Re: The Designer's Guide Community, xiaolong
    • Re: The Designer's Guide Community, John Gianni
  • Re: The Designer's Guide Community, jutek
    • Re: The Designer's Guide Community, John Gianni
      • Re: The Designer's Guide Community, Svenn Are Bjerkem
      • Re: The Designer's Guide Community, John Gianni
• How to create user-defined property for an database objest, yujie29
  • Re: How to create user-defined property for an database objest, Bernd Fischer
    • Re: How to create user-defined property for an database objest, Andrew Beckett
      • Re: How to create user-defined property for an database objest, yujie29
• Re: LVS problem, danmc
• problem with netlist and run, danmc
  • Re: problem with netlist and run, ram
    • Re: problem with netlist and run, Andrew Beckett
      • Re: problem with netlist and run, danmc
      • Re: problem with netlist and run, fogh
• 90 Degree Corner check, Roland.Fontaine@xxxxxxxxx
  • Re: 90 Degree Corner check, Kholdoun TORKI
    • Re: 90 Degree Corner check, vtcad
  • Re: 90 Degree Corner check, Edward Kalenda
• PC outperforming workstation when running EDA?, spectrallypure
  • Re: PC outperforming workstation when running EDA?, sun_powered
    • Re: PC outperforming workstation when running EDA?, spectrallypure
      • Re: PC outperforming workstation when running EDA?, Sun_Powered
      • Re: PC outperforming workstation when running EDA?, Frank E. Gennari
      • Re: PC outperforming workstation when running EDA?, spectrallypure
    • Re: PC outperforming workstation when running EDA?, jayl-news
  • Re: PC outperforming workstation when running EDA?, jayl-news
    • Re: PC outperforming workstation when running EDA?, Sun_Powered
  • Re: PC outperforming workstation when running EDA?, migotigo
    • Re: PC outperforming workstation when running EDA?, vdvalk@xxxxxxxxxx
• How to get scalar value out of a waveform?, Thomas Ussmueller
  • Re: How to get scalar value out of a waveform?, S. Badel
    • Re: How to get scalar value out of a waveform?, Thomas Ussmueller
• Re: Virtuoso Layout Editor : moving objects, Jimka
• VLE:SKILL MOS pcell properties, svilen
  • Re: VLE:SKILL MOS pcell properties, Bernd Fischer
  • Re: VLE:SKILL MOS pcell properties, S. Badel
• Please see System Specs inside and comment. Thank You! :), sun_powered
  • Re: Please see System Specs inside and comment. Thank You! :), Edward Kalenda
    • Re: Please see System Specs inside and comment. Thank You! :), WinXP_Powered
      • Re: Please see System Specs inside and comment. Thank You! :), Edward Kalenda
      • Re: Please see System Specs inside and comment. Thank You! :), sun_powered
      • Re: Please see System Specs inside and comment. Thank You! :), jayl-news
      • Re: Please see System Specs inside and comment. Thank You! :), sun_powered
      • Re: Please see System Specs inside and comment. Thank You! :), fogh
    • Re: Please see System Specs inside and comment. Thank You! :), Sun_Powered
      • Re: Please see System Specs inside and comment. Thank You! :), Frank E. Gennari
      • Re: Please see System Specs inside and comment. Thank You! :), sun_powered
• dfII to xcircuit translator, satya
  • Re: dfII to xcircuit translator, vdvalk@xxxxxxxxxx
    • Re: dfII to xcircuit translator, Svenn Are Bjerkem
    • Re: dfII to xcircuit translator, satya
• finishEnterFun() and doneProc() callback, SS
  • Re: finishEnterFun() and doneProc() callback, Pete nospam Zakel
    • Re: finishEnterFun() and doneProc() callback, SS
      • Re: finishEnterFun() and doneProc() callback, Pete nospam Zakel
      • Re: finishEnterFun() and doneProc() callback, SS
      • Re: finishEnterFun() and doneProc() callback, Pete nospam Zakel
      • Re: finishEnterFun() and doneProc() callback, Pete nospam Zakel
• Re: ADS to Cadance, Rav

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newsgroups.derkeiler.com  > Archive  > Comp  > comp.cad.cadence  > 2006-05