Power Modelling of embedded SRAM
- From: "kamesh" <vkamesh@xxxxxxxxx>
- Date: 16 Nov 2005 04:55:47 -0800
Dear all,
I am doing a project titled "Power Modelling of embedded SRAM".
There are 2 types of SRAM cells that I need to take care of one is the
standard SRAM and the other is the assymetric SRAM cell (where writing
a zero is significantly less energy consuming than writing a one). The
model should provide an estimate of the power consumption (when
reading from the memory and when writing into the memory) based on
input parameters such as Data Wordlength, Memory Size, Aspect Ratio and
Data Distribution.
Our SRAM generator in here is written in SKILL. Though most of the job
is done by that, it still needs some manual intervention in order to
create the complete layout suitable for testing.
Are there any Cadence tools which can calculate the power consumption?
I am not exactly sure how I can go about doing this task of power
modelling. I would be very greatful if you could give me some idea on
how I can proceed further in this.
I have some working knowledge of Cadence and OCEAN scripting language
but not SKILL.
Thanks and Regards,
Kamesh.
.
- Prev by Date: Re: simulating with ahdl code on Cadence IC 5.1.41.usr2
- Next by Date: Re: creating global nets in analog design environment
- Previous by thread: How to measure the phase of an opamp?
- Next by thread: How to perform xf analysis to calculate opamp's CMRR?
- Index(es):
Relevant Pages
|
