Re: Creating a real simulation model of a piece of wire
- From: fogh <cad_support@xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx>
- Date: Tue, 30 Aug 2005 19:37:42 +0200
Svenn Are Bjerkem wrote:
With assura RCX , you may have to put some dummy devices at the ends of your wire, so you do get a netlist.Hi,
this is probably a very easy question for you layouters out there:
I would like to create an av_extracted of a piece of wire for use in my simulation testbench.
So far I have used simulation res and cap and calculated a lot of data from the design manual. Then I thought it must be much easier to place a piece of wire in the layout editor, extract that layout to av_extracted and include that in my config view. That would have the great advantage that I can easily change the length of the routing metal in order to see what will happen with the rest of the system.
How would I do this?
And it will be more fun if you have also the RCX-FS ( accurate capacitance based on an EM simulation) and the RCX-PL (parasitic inductance) licenses. OK, where do go again to collect the bribes ?
.
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