Re: The coming death of all RISC chips.

Jacko wrote:
RISC is essential to reduce core area. This is important for
interleaving core gates into the memory array.

cheers jacko

Area-wise, its not clear that RISC is the way to go. The decoder on a chip is generally a small fraction of the total area. A simplistic argument is: RISC require smaller decoder. However, the instructions are bigger. So, the instruct-cache has to be larger. The increased area of the instruction-cache is much larger than the saving due to the decoder.

Of course, its not that straight-forward. But the trade-offs are too complex for anyone who makes a statement like "RISC is essential to reduce core-area" to comprehend.
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Relevant Pages

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