Re: ECC logging implementation

Glen Herrmannsfeldt wrote:
Terje Mathisen wrote:
AFAIK, the official Intel/x86 memory ordering specification says that it should not happen, but I hope I'll never write code which implicitly depends on it.

How about IA64?

"I really don't care?" :-)

Actually I do, but only as an example of a very different and therefore interesting architecture. I no longer expect to write code for it. :-(

Also, for a high-level language you might have to indicate to the
compiler that you are doing things like this. C has volatile,
and PL/I has the abnormal attribute, though as far as I know most
implementations don't do anything different. Changing the order
of loads and stores, within the aliasing rules, would not be
unusual for an optimizing compiler.

Exactly!

This is why I would never rely on an ordinary inline load or store having any sort of implied global visibility: Any operation which does require some sort of synchronization must be encapsulated in an explicit call to a function with the required functionality.

If an architecture supply sufficiently strong ordering guarantees that those function calls can become inline macros without any special lock/sync operation, that would be nice, but I won't depend on it.

Terje
--
- <Terje.Mathisen@xxxxxxxxxxxxx>
"almost all programming can be viewed as an exercise in caching"
.

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