Re: signed/unsigned ALU operations
- From: "robertwessel2@xxxxxxxxx" <robertwessel2@xxxxxxxxx>
- Date: Sat, 23 Feb 2008 01:07:29 -0800 (PST)
On Feb 23, 12:06 am, eliben <eli...@xxxxxxxxx> wrote:
Maybe, but not on current processors. Detecting overflow basically is a
conditional branch on the overflow bit (O for signed, C for carry),
Assuming that there is such a thing as an overflow bit. Not all current
processors have any condition flags such as an overflow bit. (MIPS is
probably the best known example of this.)
If you're mentioning MIPS, it's a good example of a feature I don't
understand. MIPS has ADD and ADDU on 32-bit registers. According to
the architecture manual the difference is that ADD "extends the sign
to width of register" and ADDU doesn't. I know sign extension is used
when placing 8 or 16-bit data into 32-bit registers, but why is it
needed here ? And what is the real difference between ADD and ADDU in
MIPS ?
On MIPS, ADD will trap if there's a signed overflow, and not modify
the target register. ADDU does the traditional 2's complement
overflow/wraparound, and cannot trap.
.
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