Re: How to implement the speculative loading?

On Oct 17, 4:55 pm, Ivan Wang <ivanwan...@xxxxxxxxx> wrote:
Modern chips support speculative loading. For example, on x86 this
feature is used for memory disambiguation and out-of-order loading.
My question is how this feature be implemented in modern
processor? Must it re-execute ALL the instructions that after the
load, just like a branch misprediction? Or it can ONLY re-execute the
instructions that relied on the loading value(e.g. via Reserver
Station tracking)?

I'm not quite sure what a "speculative load" is, unless it is a load
executed speculatively based on a previous branch (which, I don't
think is what you are talking about). Clearly, instructions that are
directly dependant on the load can't execute until the load finishes
(speculatively or otherwise) since some of the input values won't be
available until the load is done. Instructions following the load
might be considered speculative because the load may fail and generate
a fault, but that is run-of-the-mill OoO territory. The executed
instructions aren't speculative (they don't actually depend on the
loaded value), but they need to be nulled-out when the fault is
detected.

With speculative execution via branches, we assume that we either know
both possible target addresses for the branch (next instruction and
branch target) or that we pick up a good guess at the branch target
from branch prediction. With the load, however, there is no "load
prediction", other than the data caches, from which we could get the
loaded values.

Again, I'm mystified by the meaning of "speculative load".

- Jeff Dutky

.

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